1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: "http://devicetree.org/schemas/interrupt-controller/loongson,liointc.yaml#" 5$schema: "http://devicetree.org/meta-schemas/core.yaml#" 6 7title: Loongson Local I/O Interrupt Controller 8 9maintainers: 10 - Jiaxun Yang <jiaxun.yang@flygoat.com> 11 12description: | 13 This interrupt controller is found in the Loongson-3 family of chips as the primary 14 package interrupt controller which can route local I/O interrupt to interrupt lines 15 of cores. 16 17allOf: 18 - $ref: /schemas/interrupt-controller.yaml# 19 20properties: 21 compatible: 22 oneOf: 23 - const: loongson,liointc-1.0 24 - const: loongson,liointc-1.0a 25 26 reg: 27 maxItems: 1 28 29 interrupt-controller: true 30 31 interrupts: 32 description: 33 Interrupt source of the CPU interrupts. 34 minItems: 1 35 maxItems: 4 36 37 interrupt-names: 38 description: List of names for the parent interrupts. 39 items: 40 - const: int0 41 - const: int1 42 - const: int2 43 - const: int3 44 minItems: 1 45 maxItems: 4 46 47 '#interrupt-cells': 48 const: 2 49 50 'loongson,parent_int_map': 51 description: | 52 This property points how the children interrupts will be mapped into CPU 53 interrupt lines. Each cell refers to a parent interrupt line from 0 to 3 54 and each bit in the cell refers to a child interrupt from 0 to 31. 55 If a CPU interrupt line didn't connect with liointc, then keep its 56 cell with zero. 57 $ref: /schemas/types.yaml#/definitions/uint32-array 58 minItems: 4 59 maxItems: 4 60 61required: 62 - compatible 63 - reg 64 - interrupts 65 - interrupt-controller 66 - '#interrupt-cells' 67 - 'loongson,parent_int_map' 68 69 70unevaluatedProperties: false 71 72examples: 73 - | 74 iointc: interrupt-controller@3ff01400 { 75 compatible = "loongson,liointc-1.0"; 76 reg = <0x3ff01400 0x64>; 77 78 interrupt-controller; 79 #interrupt-cells = <2>; 80 81 interrupt-parent = <&cpuintc>; 82 interrupts = <2>, <3>; 83 interrupt-names = "int0", "int1"; 84 85 loongson,parent_int_map = <0xf0ffffff>, /* int0 */ 86 <0x0f000000>, /* int1 */ 87 <0x00000000>, /* int2 */ 88 <0x00000000>; /* int3 */ 89 90 }; 91 92... 93