xref: /linux/Documentation/devicetree/bindings/interrupt-controller/jcore,aic.yaml (revision bf373e4c786bfe989e637195252698f45b157a68)
1*50175534SRob Herring (Arm)# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*50175534SRob Herring (Arm)# Copyright 2018 Linaro Ltd.
3*50175534SRob Herring (Arm)%YAML 1.2
4*50175534SRob Herring (Arm)---
5*50175534SRob Herring (Arm)$id: http://devicetree.org/schemas/interrupt-controller/jcore,aic.yaml#
6*50175534SRob Herring (Arm)$schema: http://devicetree.org/meta-schemas/core.yaml#
7*50175534SRob Herring (Arm)
8*50175534SRob Herring (Arm)title: J-Core Advanced Interrupt Controller
9*50175534SRob Herring (Arm)
10*50175534SRob Herring (Arm)maintainers:
11*50175534SRob Herring (Arm)  - Rich Felker <dalias@libc.org>
12*50175534SRob Herring (Arm)
13*50175534SRob Herring (Arm)properties:
14*50175534SRob Herring (Arm)  compatible:
15*50175534SRob Herring (Arm)    enum:
16*50175534SRob Herring (Arm)      - jcore,aic1
17*50175534SRob Herring (Arm)      - jcore,aic2
18*50175534SRob Herring (Arm)
19*50175534SRob Herring (Arm)  reg:
20*50175534SRob Herring (Arm)    description: Memory region(s) for configuration. For SMP, there should be one
21*50175534SRob Herring (Arm)      region per CPU, indexed by the sequential, zero-based hardware CPU number.
22*50175534SRob Herring (Arm)
23*50175534SRob Herring (Arm)  interrupt-controller: true
24*50175534SRob Herring (Arm)
25*50175534SRob Herring (Arm)  '#interrupt-cells':
26*50175534SRob Herring (Arm)    const: 1
27*50175534SRob Herring (Arm)
28*50175534SRob Herring (Arm)required:
29*50175534SRob Herring (Arm)  - compatible
30*50175534SRob Herring (Arm)  - reg
31*50175534SRob Herring (Arm)  - interrupt-controller
32*50175534SRob Herring (Arm)  - '#interrupt-cells'
33*50175534SRob Herring (Arm)
34*50175534SRob Herring (Arm)additionalProperties: false
35*50175534SRob Herring (Arm)
36*50175534SRob Herring (Arm)examples:
37*50175534SRob Herring (Arm)  - |
38*50175534SRob Herring (Arm)    aic: interrupt-controller@200 {
39*50175534SRob Herring (Arm)        compatible = "jcore,aic2";
40*50175534SRob Herring (Arm)        reg = <0x200 0x30>, <0x500 0x30>;
41*50175534SRob Herring (Arm)        interrupt-controller;
42*50175534SRob Herring (Arm)        #interrupt-cells = <1>;
43*50175534SRob Herring (Arm)    };
44