xref: /linux/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-msi.yaml (revision a1ff5a7d78a036d6c2178ee5acd6ba4946243800)
1*c184d44aSFrank Li# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*c184d44aSFrank Li%YAML 1.2
3*c184d44aSFrank Li---
4*c184d44aSFrank Li$id: http://devicetree.org/schemas/interrupt-controller/fsl,ls-msi.yaml#
5*c184d44aSFrank Li$schema: http://devicetree.org/meta-schemas/core.yaml#
6*c184d44aSFrank Li
7*c184d44aSFrank Lititle: Freescale Layerscape SCFG PCIe MSI controller
8*c184d44aSFrank Li
9*c184d44aSFrank Lidescription: |
10*c184d44aSFrank Li  This interrupt controller hardware is a second level interrupt controller that
11*c184d44aSFrank Li  is hooked to a parent interrupt controller: e.g: ARM GIC for ARM-based
12*c184d44aSFrank Li  platforms. If interrupt-parent is not provided, the default parent interrupt
13*c184d44aSFrank Li  controller will be used.
14*c184d44aSFrank Li
15*c184d44aSFrank Li  Each PCIe node needs to have property msi-parent that points to
16*c184d44aSFrank Li  MSI controller node
17*c184d44aSFrank Li
18*c184d44aSFrank Limaintainers:
19*c184d44aSFrank Li  - Frank Li <Frank.Li@nxp.com>
20*c184d44aSFrank Li
21*c184d44aSFrank Liproperties:
22*c184d44aSFrank Li  compatible:
23*c184d44aSFrank Li    enum:
24*c184d44aSFrank Li      - fsl,ls1012a-msi
25*c184d44aSFrank Li      - fsl,ls1021a-msi
26*c184d44aSFrank Li      - fsl,ls1043a-msi
27*c184d44aSFrank Li      - fsl,ls1043a-v1.1-msi
28*c184d44aSFrank Li      - fsl,ls1046a-msi
29*c184d44aSFrank Li
30*c184d44aSFrank Li  reg:
31*c184d44aSFrank Li    maxItems: 1
32*c184d44aSFrank Li
33*c184d44aSFrank Li  '#msi-cells':
34*c184d44aSFrank Li    const: 1
35*c184d44aSFrank Li
36*c184d44aSFrank Li  interrupts:
37*c184d44aSFrank Li    items:
38*c184d44aSFrank Li      - description: Shared MSI interrupt group 0
39*c184d44aSFrank Li      - description: Shared MSI interrupt group 1
40*c184d44aSFrank Li      - description: Shared MSI interrupt group 2
41*c184d44aSFrank Li      - description: Shared MSI interrupt group 3
42*c184d44aSFrank Li    minItems: 1
43*c184d44aSFrank Li
44*c184d44aSFrank Lirequired:
45*c184d44aSFrank Li  - compatible
46*c184d44aSFrank Li  - reg
47*c184d44aSFrank Li  - msi-controller
48*c184d44aSFrank Li  - interrupts
49*c184d44aSFrank Li
50*c184d44aSFrank LiallOf:
51*c184d44aSFrank Li  - $ref: msi-controller.yaml
52*c184d44aSFrank Li  - if:
53*c184d44aSFrank Li      properties:
54*c184d44aSFrank Li        compatible:
55*c184d44aSFrank Li          contains:
56*c184d44aSFrank Li            enum:
57*c184d44aSFrank Li              - fsl,ls1046a-msi
58*c184d44aSFrank Li    then:
59*c184d44aSFrank Li      properties:
60*c184d44aSFrank Li        interrupts:
61*c184d44aSFrank Li          minItems: 4
62*c184d44aSFrank Li    else:
63*c184d44aSFrank Li      properties:
64*c184d44aSFrank Li        interrupts:
65*c184d44aSFrank Li          maxItems: 1
66*c184d44aSFrank Li
67*c184d44aSFrank LiunevaluatedProperties: false
68*c184d44aSFrank Li
69*c184d44aSFrank Liexamples:
70*c184d44aSFrank Li  - |
71*c184d44aSFrank Li    #include <dt-bindings/interrupt-controller/arm-gic.h>
72*c184d44aSFrank Li
73*c184d44aSFrank Li    interrupt-controller@1571000 {
74*c184d44aSFrank Li        compatible = "fsl,ls1043a-msi";
75*c184d44aSFrank Li        reg = <0x1571000 0x8>;
76*c184d44aSFrank Li        msi-controller;
77*c184d44aSFrank Li        #msi-cells = <1>;
78*c184d44aSFrank Li        interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
79*c184d44aSFrank Li    };
80