xref: /linux/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml (revision 53597deca0e38c30e6cd4ba2114fa42d2bcd85bb) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/interrupt-controller/fsl,irqsteer.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale IRQSTEER Interrupt Multiplexer
8
9maintainers:
10  - Lucas Stach <l.stach@pengutronix.de>
11
12properties:
13  compatible:
14    oneOf:
15      - enum:
16          - fsl,imx-irqsteer
17          - nxp,s32n79-irqsteer
18      - items:
19          - enum:
20              - fsl,imx8m-irqsteer
21              - fsl,imx8mp-irqsteer
22              - fsl,imx8qm-irqsteer
23              - fsl,imx8qxp-irqsteer
24              - fsl,imx94-irqsteer
25              - fsl,imx95-irqsteer
26          - const: fsl,imx-irqsteer
27
28  reg:
29    maxItems: 1
30
31  interrupts:
32    description: |
33      should contain the up to 8 parent interrupt lines used to multiplex
34      the input interrupts. They should be specified sequentially from
35      output 0 to 7.
36    items:
37      - description: output interrupt 0
38      - description: output interrupt 1
39      - description: output interrupt 2
40      - description: output interrupt 3
41      - description: output interrupt 4
42      - description: output interrupt 5
43      - description: output interrupt 6
44      - description: output interrupt 7
45    minItems: 1
46
47  clocks:
48    maxItems: 1
49
50  clock-names:
51    const: ipg
52
53  power-domains:
54    maxItems: 1
55
56  interrupt-controller: true
57
58  "#interrupt-cells":
59    const: 1
60
61  fsl,channel:
62    $ref: /schemas/types.yaml#/definitions/uint32
63    description: |
64      u32 value representing the output channel that all input IRQs should be
65      steered into.
66
67  fsl,num-irqs:
68    $ref: /schemas/types.yaml#/definitions/uint32
69    description: |
70      u32 value representing the number of input interrupts of this channel,
71      should be multiple of 32 input interrupts and up to 512 interrupts.
72
73required:
74  - compatible
75  - reg
76  - interrupts
77  - clocks
78  - clock-names
79  - interrupt-controller
80  - "#interrupt-cells"
81  - fsl,channel
82  - fsl,num-irqs
83
84allOf:
85  - if:
86      properties:
87        compatible:
88          contains:
89            enum:
90              - fsl,imx8mp-irqsteer
91              - fsl,imx8qm-irqsteer
92              - fsl,imx8qxp-irqsteer
93              - fsl,imx95-irqsteer
94    then:
95      required:
96        - power-domains
97    else:
98      properties:
99        power-domains: false
100
101additionalProperties: false
102
103examples:
104  - |
105    #include <dt-bindings/clock/imx8mq-clock.h>
106    #include <dt-bindings/interrupt-controller/arm-gic.h>
107
108    interrupt-controller@32e2d000 {
109        compatible = "fsl,imx-irqsteer";
110        reg = <0x32e2d000 0x1000>;
111        interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
112        clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>;
113        clock-names = "ipg";
114        fsl,channel = <0>;
115        fsl,num-irqs = <64>;
116        interrupt-controller;
117        #interrupt-cells = <1>;
118    };
119