1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/interrupt-controller/fsl,ls-extirq.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Freescale Layerscape External Interrupt Controller 8 9maintainers: 10 - Shawn Guo <shawnguo@kernel.org> 11 - Li Yang <leoyang.li@nxp.com> 12 13description: | 14 Some Layerscape SOCs (LS1021A, LS1043A, LS1046A LS1088A, LS208xA, 15 LX216xA) support inverting the polarity of certain external interrupt 16 lines. 17 18properties: 19 compatible: 20 oneOf: 21 - enum: 22 - fsl,ls1021a-extirq 23 - fsl,ls1043a-extirq 24 - fsl,ls1088a-extirq 25 - items: 26 - enum: 27 - fsl,ls1046a-extirq 28 - const: fsl,ls1043a-extirq 29 - items: 30 - enum: 31 - fsl,ls2080a-extirq 32 - fsl,lx2160a-extirq 33 - const: fsl,ls1088a-extirq 34 35 '#interrupt-cells': 36 const: 2 37 38 '#address-cells': 39 const: 0 40 41 interrupt-controller: true 42 43 reg: 44 maxItems: 1 45 description: 46 Specifies the Interrupt Polarity Control Register (INTPCR) in the 47 SCFG or the External Interrupt Control Register (IRQCR) in the ISC. 48 49 interrupt-map: 50 description: Specifies the mapping from external interrupts to GIC interrupts. 51 52 interrupt-map-mask: true 53 54required: 55 - compatible 56 - '#interrupt-cells' 57 - '#address-cells' 58 - interrupt-controller 59 - reg 60 - interrupt-map 61 - interrupt-map-mask 62 63allOf: 64 - if: 65 properties: 66 compatible: 67 contains: 68 enum: 69 - fsl,ls1021a-extirq 70 then: 71 properties: 72 interrupt-map: 73 minItems: 6 74 maxItems: 6 75 interrupt-map-mask: 76 items: 77 - const: 0x7 78 - const: 0 79 - if: 80 properties: 81 compatible: 82 contains: 83 enum: 84 - fsl,ls1043a-extirq 85 - fsl,ls1046a-extirq 86 - fsl,ls1088a-extirq 87 - fsl,ls2080a-extirq 88 - fsl,lx2160a-extirq 89 then: 90 properties: 91 interrupt-map: 92 minItems: 12 93 maxItems: 12 94 interrupt-map-mask: 95 items: 96 - const: 0xf 97 - const: 0 98 99additionalProperties: false 100 101examples: 102 - | 103 #include <dt-bindings/interrupt-controller/arm-gic.h> 104 interrupt-controller@1ac { 105 compatible = "fsl,ls1021a-extirq"; 106 #interrupt-cells = <2>; 107 #address-cells = <0>; 108 interrupt-controller; 109 reg = <0x1ac 4>; 110 interrupt-map = 111 <0 0 &gic GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>, 112 <1 0 &gic GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>, 113 <2 0 &gic GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>, 114 <3 0 &gic GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>, 115 <4 0 &gic GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, 116 <5 0 &gic GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; 117 interrupt-map-mask = <0x7 0x0>; 118 }; 119