xref: /linux/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.yaml (revision 974099e40e924a911000541fea0b59d075a3d1d0)
10037c30aSMichael Walle# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
20037c30aSMichael Walle%YAML 1.2
30037c30aSMichael Walle---
40037c30aSMichael Walle$id: http://devicetree.org/schemas/interrupt-controller/fsl,ls-extirq.yaml#
50037c30aSMichael Walle$schema: http://devicetree.org/meta-schemas/core.yaml#
60037c30aSMichael Walle
70037c30aSMichael Walletitle: Freescale Layerscape External Interrupt Controller
80037c30aSMichael Walle
90037c30aSMichael Wallemaintainers:
100037c30aSMichael Walle  - Shawn Guo <shawnguo@kernel.org>
110037c30aSMichael Walle
120037c30aSMichael Walledescription: |
130037c30aSMichael Walle  Some Layerscape SOCs (LS1021A, LS1043A, LS1046A LS1088A, LS208xA,
140037c30aSMichael Walle  LX216xA) support inverting the polarity of certain external interrupt
150037c30aSMichael Walle  lines.
160037c30aSMichael Walle
170037c30aSMichael Walleproperties:
180037c30aSMichael Walle  compatible:
190037c30aSMichael Walle    oneOf:
200037c30aSMichael Walle      - enum:
210037c30aSMichael Walle          - fsl,ls1021a-extirq
220037c30aSMichael Walle          - fsl,ls1043a-extirq
230037c30aSMichael Walle          - fsl,ls1088a-extirq
240037c30aSMichael Walle      - items:
250037c30aSMichael Walle          - enum:
260037c30aSMichael Walle              - fsl,ls1046a-extirq
270037c30aSMichael Walle          - const: fsl,ls1043a-extirq
280037c30aSMichael Walle      - items:
290037c30aSMichael Walle          - enum:
300037c30aSMichael Walle              - fsl,ls2080a-extirq
310037c30aSMichael Walle              - fsl,lx2160a-extirq
320037c30aSMichael Walle          - const: fsl,ls1088a-extirq
330037c30aSMichael Walle
340037c30aSMichael Walle  '#interrupt-cells':
350037c30aSMichael Walle    const: 2
360037c30aSMichael Walle
370037c30aSMichael Walle  '#address-cells':
380037c30aSMichael Walle    const: 0
390037c30aSMichael Walle
400037c30aSMichael Walle  interrupt-controller: true
410037c30aSMichael Walle
420037c30aSMichael Walle  reg:
430037c30aSMichael Walle    maxItems: 1
440037c30aSMichael Walle    description:
450037c30aSMichael Walle      Specifies the Interrupt Polarity Control Register (INTPCR) in the
460037c30aSMichael Walle      SCFG or the External Interrupt Control Register (IRQCR) in the ISC.
470037c30aSMichael Walle
480037c30aSMichael Walle  interrupt-map:
490037c30aSMichael Walle    description: Specifies the mapping from external interrupts to GIC interrupts.
500037c30aSMichael Walle
510037c30aSMichael Walle  interrupt-map-mask: true
520037c30aSMichael Walle
530037c30aSMichael Wallerequired:
540037c30aSMichael Walle  - compatible
550037c30aSMichael Walle  - '#interrupt-cells'
560037c30aSMichael Walle  - '#address-cells'
570037c30aSMichael Walle  - interrupt-controller
580037c30aSMichael Walle  - reg
590037c30aSMichael Walle  - interrupt-map
600037c30aSMichael Walle  - interrupt-map-mask
610037c30aSMichael Walle
620037c30aSMichael WalleallOf:
630037c30aSMichael Walle  - if:
640037c30aSMichael Walle      properties:
650037c30aSMichael Walle        compatible:
660037c30aSMichael Walle          contains:
670037c30aSMichael Walle            enum:
680037c30aSMichael Walle              - fsl,ls1021a-extirq
690037c30aSMichael Walle    then:
700037c30aSMichael Walle      properties:
710037c30aSMichael Walle        interrupt-map:
720037c30aSMichael Walle          minItems: 6
730037c30aSMichael Walle          maxItems: 6
740037c30aSMichael Walle        interrupt-map-mask:
750037c30aSMichael Walle          items:
760037c30aSMichael Walle            - const: 0x7
770037c30aSMichael Walle            - const: 0
780037c30aSMichael Walle  - if:
790037c30aSMichael Walle      properties:
800037c30aSMichael Walle        compatible:
810037c30aSMichael Walle          contains:
820037c30aSMichael Walle            enum:
830037c30aSMichael Walle              - fsl,ls1043a-extirq
840037c30aSMichael Walle              - fsl,ls1046a-extirq
850037c30aSMichael Walle    then:
860037c30aSMichael Walle      properties:
870037c30aSMichael Walle        interrupt-map:
880037c30aSMichael Walle          minItems: 12
890037c30aSMichael Walle          maxItems: 12
900037c30aSMichael Walle        interrupt-map-mask:
910037c30aSMichael Walle          items:
920037c30aSMichael Walle            - const: 0xf
930037c30aSMichael Walle            - const: 0
940037c30aSMichael Walle
95*6df11978SFrank Li  - if:
96*6df11978SFrank Li      properties:
97*6df11978SFrank Li        compatible:
98*6df11978SFrank Li          contains:
99*6df11978SFrank Li            enum:
100*6df11978SFrank Li              - fsl,ls1088a-extirq
101*6df11978SFrank Li              - fsl,ls2080a-extirq
102*6df11978SFrank Li              - fsl,lx2160a-extirq
103*6df11978SFrank Li# The driver(drivers/irqchip/irq-ls-extirq.c) have not use standard DT
104*6df11978SFrank Li# function to parser interrupt-map. So it doesn't consider '#address-size'
105*6df11978SFrank Li# in parent interrupt controller, such as GIC.
106*6df11978SFrank Li#
107*6df11978SFrank Li# When dt-binding verify interrupt-map, item data matrix is spitted at
108*6df11978SFrank Li# incorrect position. Remove interrupt-map restriction because it always
109*6df11978SFrank Li# wrong.
110*6df11978SFrank Li
111*6df11978SFrank Li    then:
112*6df11978SFrank Li      properties:
113*6df11978SFrank Li        interrupt-map-mask:
114*6df11978SFrank Li          items:
115*6df11978SFrank Li            - const: 0xf
116*6df11978SFrank Li            - const: 0
117*6df11978SFrank Li
1180037c30aSMichael WalleadditionalProperties: false
1190037c30aSMichael Walle
1200037c30aSMichael Walleexamples:
1210037c30aSMichael Walle  - |
1220037c30aSMichael Walle    #include <dt-bindings/interrupt-controller/arm-gic.h>
1230037c30aSMichael Walle    interrupt-controller@1ac {
1240037c30aSMichael Walle            compatible = "fsl,ls1021a-extirq";
1250037c30aSMichael Walle            #interrupt-cells = <2>;
1260037c30aSMichael Walle            #address-cells = <0>;
1270037c30aSMichael Walle            interrupt-controller;
1280037c30aSMichael Walle            reg = <0x1ac 4>;
1290037c30aSMichael Walle            interrupt-map =
1300037c30aSMichael Walle                    <0 0 &gic GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
1310037c30aSMichael Walle                    <1 0 &gic GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
1320037c30aSMichael Walle                    <2 0 &gic GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
1330037c30aSMichael Walle                    <3 0 &gic GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
1340037c30aSMichael Walle                    <4 0 &gic GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
1350037c30aSMichael Walle                    <5 0 &gic GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1360037c30aSMichael Walle            interrupt-map-mask = <0x7 0x0>;
1370037c30aSMichael Walle    };
138