1*3cbc6d07SRob Herring (Arm)# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*3cbc6d07SRob Herring (Arm)%YAML 1.2 3*3cbc6d07SRob Herring (Arm)--- 4*3cbc6d07SRob Herring (Arm)$id: http://devicetree.org/schemas/interrupt-controller/cirrus,ep7209-intc.yaml# 5*3cbc6d07SRob Herring (Arm)$schema: http://devicetree.org/meta-schemas/core.yaml# 6*3cbc6d07SRob Herring (Arm) 7*3cbc6d07SRob Herring (Arm)title: Cirrus Logic CLPS711X Interrupt Controller 8*3cbc6d07SRob Herring (Arm) 9*3cbc6d07SRob Herring (Arm)maintainers: 10*3cbc6d07SRob Herring (Arm) - Alexander Shiyan <shc_work@mail.ru> 11*3cbc6d07SRob Herring (Arm) 12*3cbc6d07SRob Herring (Arm)description: > 13*3cbc6d07SRob Herring (Arm) Cirrus Logic CLPS711X Interrupt Controller 14*3cbc6d07SRob Herring (Arm) 15*3cbc6d07SRob Herring (Arm) The interrupt sources are as follows: 16*3cbc6d07SRob Herring (Arm) ID Name Description 17*3cbc6d07SRob Herring (Arm) --------------------------- 18*3cbc6d07SRob Herring (Arm) 1: BLINT Battery low (FIQ) 19*3cbc6d07SRob Herring (Arm) 3: MCINT Media changed (FIQ) 20*3cbc6d07SRob Herring (Arm) 4: CSINT CODEC sound 21*3cbc6d07SRob Herring (Arm) 5: EINT1 External 1 22*3cbc6d07SRob Herring (Arm) 6: EINT2 External 2 23*3cbc6d07SRob Herring (Arm) 7: EINT3 External 3 24*3cbc6d07SRob Herring (Arm) 8: TC1OI TC1 under flow 25*3cbc6d07SRob Herring (Arm) 9: TC2OI TC2 under flow 26*3cbc6d07SRob Herring (Arm) 10: RTCMI RTC compare match 27*3cbc6d07SRob Herring (Arm) 11: TINT 64Hz tick 28*3cbc6d07SRob Herring (Arm) 12: UTXINT1 UART1 transmit FIFO half empty 29*3cbc6d07SRob Herring (Arm) 13: URXINT1 UART1 receive FIFO half full 30*3cbc6d07SRob Herring (Arm) 14: UMSINT UART1 modem status changed 31*3cbc6d07SRob Herring (Arm) 15: SSEOTI SSI1 end of transfer 32*3cbc6d07SRob Herring (Arm) 16: KBDINT Keyboard 33*3cbc6d07SRob Herring (Arm) 17: SS2RX SSI2 receive FIFO half or greater full 34*3cbc6d07SRob Herring (Arm) 18: SS2TX SSI2 transmit FIFO less than half empty 35*3cbc6d07SRob Herring (Arm) 28: UTXINT2 UART2 transmit FIFO half empty 36*3cbc6d07SRob Herring (Arm) 29: URXINT2 UART2 receive FIFO half full 37*3cbc6d07SRob Herring (Arm) 32: DAIINT DAI interface (FIQ) 38*3cbc6d07SRob Herring (Arm) 39*3cbc6d07SRob Herring (Arm)properties: 40*3cbc6d07SRob Herring (Arm) compatible: 41*3cbc6d07SRob Herring (Arm) oneOf: 42*3cbc6d07SRob Herring (Arm) - items: 43*3cbc6d07SRob Herring (Arm) - const: cirrus,ep7312-intc 44*3cbc6d07SRob Herring (Arm) - const: cirrus,ep7209-intc 45*3cbc6d07SRob Herring (Arm) - items: 46*3cbc6d07SRob Herring (Arm) - const: cirrus,ep7209-intc 47*3cbc6d07SRob Herring (Arm) 48*3cbc6d07SRob Herring (Arm) reg: 49*3cbc6d07SRob Herring (Arm) maxItems: 1 50*3cbc6d07SRob Herring (Arm) 51*3cbc6d07SRob Herring (Arm) interrupt-controller: true 52*3cbc6d07SRob Herring (Arm) 53*3cbc6d07SRob Herring (Arm) '#interrupt-cells': 54*3cbc6d07SRob Herring (Arm) const: 1 55*3cbc6d07SRob Herring (Arm) 56*3cbc6d07SRob Herring (Arm)required: 57*3cbc6d07SRob Herring (Arm) - compatible 58*3cbc6d07SRob Herring (Arm) - reg 59*3cbc6d07SRob Herring (Arm) - interrupt-controller 60*3cbc6d07SRob Herring (Arm) - '#interrupt-cells' 61*3cbc6d07SRob Herring (Arm) 62*3cbc6d07SRob Herring (Arm)additionalProperties: false 63*3cbc6d07SRob Herring (Arm) 64*3cbc6d07SRob Herring (Arm)examples: 65*3cbc6d07SRob Herring (Arm) - | 66*3cbc6d07SRob Herring (Arm) interrupt-controller@80000000 { 67*3cbc6d07SRob Herring (Arm) compatible = "cirrus,ep7312-intc", "cirrus,ep7209-intc"; 68*3cbc6d07SRob Herring (Arm) reg = <0x80000000 0x4000>; 69*3cbc6d07SRob Herring (Arm) interrupt-controller; 70*3cbc6d07SRob Herring (Arm) #interrupt-cells = <1>; 71*3cbc6d07SRob Herring (Arm) }; 72