1*0a56f9eeSBrendan HigginsDevice tree configuration for the I2C Interrupt Controller on the AST24XX and 2*0a56f9eeSBrendan HigginsAST25XX SoCs. 3*0a56f9eeSBrendan Higgins 4*0a56f9eeSBrendan HigginsRequired Properties: 5*0a56f9eeSBrendan Higgins- #address-cells : should be 1 6*0a56f9eeSBrendan Higgins- #size-cells : should be 1 7*0a56f9eeSBrendan Higgins- #interrupt-cells : should be 1 8*0a56f9eeSBrendan Higgins- compatible : should be "aspeed,ast2400-i2c-ic" 9*0a56f9eeSBrendan Higgins or "aspeed,ast2500-i2c-ic" 10*0a56f9eeSBrendan Higgins- reg : address start and range of controller 11*0a56f9eeSBrendan Higgins- interrupts : interrupt number 12*0a56f9eeSBrendan Higgins- interrupt-controller : denotes that the controller receives and fires 13*0a56f9eeSBrendan Higgins new interrupts for child busses 14*0a56f9eeSBrendan Higgins 15*0a56f9eeSBrendan HigginsExample: 16*0a56f9eeSBrendan Higgins 17*0a56f9eeSBrendan Higginsi2c_ic: interrupt-controller@0 { 18*0a56f9eeSBrendan Higgins #address-cells = <1>; 19*0a56f9eeSBrendan Higgins #size-cells = <1>; 20*0a56f9eeSBrendan Higgins #interrupt-cells = <1>; 21*0a56f9eeSBrendan Higgins compatible = "aspeed,ast2400-i2c-ic"; 22*0a56f9eeSBrendan Higgins reg = <0x0 0x40>; 23*0a56f9eeSBrendan Higgins interrupts = <12>; 24*0a56f9eeSBrendan Higgins interrupt-controller; 25*0a56f9eeSBrendan Higgins}; 26