xref: /linux/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml (revision aaa44952bbd1d4db14a4d676bf9595bb5db7e7b0) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/interrupt-controller/apple,aic.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Apple Interrupt Controller
8
9maintainers:
10  - Hector Martin <marcan@marcan.st>
11
12description: |
13  The Apple Interrupt Controller is a simple interrupt controller present on
14  Apple ARM SoC platforms, including various iPhone and iPad devices and the
15  "Apple Silicon" Macs.
16
17  It provides the following features:
18
19  - Level-triggered hardware IRQs wired to SoC blocks
20    - Single mask bit per IRQ
21    - Per-IRQ affinity setting
22    - Automatic masking on event delivery (auto-ack)
23    - Software triggering (ORed with hw line)
24  - 2 per-CPU IPIs (meant as "self" and "other", but they are interchangeable
25    if not symmetric)
26  - Automatic prioritization (single event/ack register per CPU, lower IRQs =
27    higher priority)
28  - Automatic masking on ack
29  - Default "this CPU" register view and explicit per-CPU views
30
31  This device also represents the FIQ interrupt sources on platforms using AIC,
32  which do not go through a discrete interrupt controller.
33
34allOf:
35  - $ref: /schemas/interrupt-controller.yaml#
36
37properties:
38  compatible:
39    items:
40      - const: apple,t8103-aic
41      - const: apple,aic
42
43  interrupt-controller: true
44
45  '#interrupt-cells':
46    const: 3
47    description: |
48      The 1st cell contains the interrupt type:
49        - 0: Hardware IRQ
50        - 1: FIQ
51
52      The 2nd cell contains the interrupt number.
53        - HW IRQs: interrupt number
54        - FIQs:
55          - 0: physical HV timer
56          - 1: virtual HV timer
57          - 2: physical guest timer
58          - 3: virtual guest timer
59
60      The 3rd cell contains the interrupt flags. This is normally
61      IRQ_TYPE_LEVEL_HIGH (4).
62
63  reg:
64    description: |
65      Specifies base physical address and size of the AIC registers.
66    maxItems: 1
67
68required:
69  - compatible
70  - '#interrupt-cells'
71  - interrupt-controller
72  - reg
73
74additionalProperties: false
75
76examples:
77  - |
78    soc {
79        #address-cells = <2>;
80        #size-cells = <2>;
81
82        aic: interrupt-controller@23b100000 {
83            compatible = "apple,t8103-aic", "apple,aic";
84            #interrupt-cells = <3>;
85            interrupt-controller;
86            reg = <0x2 0x3b100000 0x0 0x8000>;
87        };
88    };
89