1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/interconnect/qcom,sc7280-rpmh.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm RPMh Network-On-Chip Interconnect on SC7280 8 9maintainers: 10 - Bjorn Andersson <andersson@kernel.org> 11 - Konrad Dybcio <konradybcio@kernel.org> 12 13description: | 14 RPMh interconnect providers support system bandwidth requirements through 15 RPMh hardware accelerators known as Bus Clock Manager (BCM). 16 17 See also:: include/dt-bindings/interconnect/qcom,sc7280.h 18 19properties: 20 compatible: 21 enum: 22 - qcom,sc7280-aggre1-noc 23 - qcom,sc7280-aggre2-noc 24 - qcom,sc7280-clk-virt 25 - qcom,sc7280-cnoc2 26 - qcom,sc7280-cnoc3 27 - qcom,sc7280-dc-noc 28 - qcom,sc7280-gem-noc 29 - qcom,sc7280-lpass-ag-noc 30 - qcom,sc7280-mc-virt 31 - qcom,sc7280-mmss-noc 32 - qcom,sc7280-nsp-noc 33 - qcom,sc7280-system-noc 34 35 reg: 36 maxItems: 1 37 38 clocks: 39 minItems: 1 40 maxItems: 2 41 42required: 43 - compatible 44 45allOf: 46 - $ref: qcom,rpmh-common.yaml# 47 - if: 48 properties: 49 compatible: 50 contains: 51 enum: 52 - qcom,sc7280-clk-virt 53 then: 54 properties: 55 reg: false 56 else: 57 required: 58 - reg 59 60 - if: 61 properties: 62 compatible: 63 contains: 64 enum: 65 - qcom,sc7280-aggre1-noc 66 then: 67 properties: 68 clocks: 69 items: 70 - description: aggre UFS PHY AXI clock 71 - description: aggre USB3 PRIM AXI clock 72 73 - if: 74 properties: 75 compatible: 76 contains: 77 enum: 78 - qcom,sc7280-aggre2-noc 79 then: 80 properties: 81 clocks: 82 items: 83 - description: RPMH CC IPA clock 84 85 - if: 86 properties: 87 compatible: 88 contains: 89 enum: 90 - qcom,sc7280-aggre1-noc 91 - qcom,sc7280-aggre2-noc 92 then: 93 required: 94 - clocks 95 else: 96 properties: 97 clocks: false 98 99unevaluatedProperties: false 100 101examples: 102 - | 103 #include <dt-bindings/clock/qcom,gcc-sc7280.h> 104 interconnect { 105 compatible = "qcom,sc7280-clk-virt"; 106 #interconnect-cells = <2>; 107 qcom,bcm-voters = <&apps_bcm_voter>; 108 }; 109 110 interconnect@9100000 { 111 reg = <0x9100000 0xe2200>; 112 compatible = "qcom,sc7280-gem-noc"; 113 #interconnect-cells = <2>; 114 qcom,bcm-voters = <&apps_bcm_voter>; 115 }; 116 117 interconnect@16e0000 { 118 reg = <0x016e0000 0x1c080>; 119 compatible = "qcom,sc7280-aggre1-noc"; 120 #interconnect-cells = <2>; 121 qcom,bcm-voters = <&apps_bcm_voter>; 122 clocks = <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>, 123 <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>; 124 }; 125