xref: /linux/Documentation/devicetree/bindings/interconnect/qcom,qcm2290.yaml (revision 34f7c6e7d4396090692a09789db231e12cb4762b) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/interconnect/qcom,qcm2290.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm QCM2290 Network-On-Chip interconnect
8
9maintainers:
10  - Shawn Guo <shawn.guo@linaro.org>
11
12description: |
13  The Qualcomm QCM2290 interconnect providers support adjusting the
14  bandwidth requirements between the various NoC fabrics.
15
16properties:
17  reg:
18    maxItems: 1
19
20  compatible:
21    enum:
22      - qcom,qcm2290-bimc
23      - qcom,qcm2290-cnoc
24      - qcom,qcm2290-snoc
25
26  '#interconnect-cells':
27    const: 1
28
29  clock-names:
30    items:
31      - const: bus
32      - const: bus_a
33
34  clocks:
35    items:
36      - description: Bus Clock
37      - description: Bus A Clock
38
39# Child node's properties
40patternProperties:
41  '^interconnect-[a-z0-9]+$':
42    type: object
43    description:
44      The interconnect providers do not have a separate QoS register space,
45      but share parent's space.
46
47    properties:
48      compatible:
49        enum:
50          - qcom,qcm2290-qup-virt
51          - qcom,qcm2290-mmrt-virt
52          - qcom,qcm2290-mmnrt-virt
53
54      '#interconnect-cells':
55        const: 1
56
57      clock-names:
58        items:
59          - const: bus
60          - const: bus_a
61
62      clocks:
63        items:
64          - description: Bus Clock
65          - description: Bus A Clock
66
67    required:
68      - compatible
69      - '#interconnect-cells'
70      - clock-names
71      - clocks
72
73    additionalProperties: false
74
75required:
76  - compatible
77  - reg
78  - '#interconnect-cells'
79  - clock-names
80  - clocks
81
82additionalProperties: false
83
84examples:
85  - |
86    #include <dt-bindings/clock/qcom,rpmcc.h>
87
88    snoc: interconnect@1880000 {
89        compatible = "qcom,qcm2290-snoc";
90        reg = <0x01880000 0x60200>;
91        #interconnect-cells = <1>;
92        clock-names = "bus", "bus_a";
93        clocks = <&rpmcc RPM_SMD_SNOC_CLK>,
94                 <&rpmcc RPM_SMD_SNOC_A_CLK>;
95
96        qup_virt: interconnect-qup {
97            compatible = "qcom,qcm2290-qup-virt";
98            #interconnect-cells = <1>;
99            clock-names = "bus", "bus_a";
100            clocks = <&rpmcc RPM_SMD_QUP_CLK>,
101                     <&rpmcc RPM_SMD_QUP_A_CLK>;
102        };
103
104        mmnrt_virt: interconnect-mmnrt {
105            compatible = "qcom,qcm2290-mmnrt-virt";
106            #interconnect-cells = <1>;
107            clock-names = "bus", "bus_a";
108            clocks = <&rpmcc RPM_SMD_MMNRT_CLK>,
109                     <&rpmcc RPM_SMD_MMNRT_A_CLK>;
110        };
111
112        mmrt_virt: interconnect-mmrt {
113            compatible = "qcom,qcm2290-mmrt-virt";
114            #interconnect-cells = <1>;
115            clock-names = "bus", "bus_a";
116            clocks = <&rpmcc RPM_SMD_MMRT_CLK>,
117                     <&rpmcc RPM_SMD_MMRT_A_CLK>;
118        };
119    };
120
121    cnoc: interconnect@1900000 {
122        compatible = "qcom,qcm2290-cnoc";
123        reg = <0x01900000 0x8200>;
124        #interconnect-cells = <1>;
125        clock-names = "bus", "bus_a";
126        clocks = <&rpmcc RPM_SMD_CNOC_CLK>,
127                 <&rpmcc RPM_SMD_CNOC_A_CLK>;
128    };
129
130    bimc: interconnect@4480000 {
131        compatible = "qcom,qcm2290-bimc";
132        reg = <0x04480000 0x80000>;
133        #interconnect-cells = <1>;
134        clock-names = "bus", "bus_a";
135        clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
136                 <&rpmcc RPM_SMD_BIMC_A_CLK>;
137    };
138