1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/interconnect/qcom,sdx75-rpmh.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm RPMh Network-On-Chip Interconnect on SDX75 8 9maintainers: 10 - Rohit Agarwal <quic_rohiagar@quicinc.com> 11 12description: 13 RPMh interconnect providers support system bandwidth requirements through 14 RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is 15 able to communicate with the BCM through the Resource State Coordinator (RSC) 16 associated with each execution environment. Provider nodes must point to at 17 least one RPMh device child node pertaining to their RSC and each provider 18 can map to multiple RPMh resources. 19 20properties: 21 compatible: 22 enum: 23 - qcom,sdx75-clk-virt 24 - qcom,sdx75-dc-noc 25 - qcom,sdx75-gem-noc 26 - qcom,sdx75-mc-virt 27 - qcom,sdx75-pcie-anoc 28 - qcom,sdx75-system-noc 29 30 '#interconnect-cells': true 31 32 reg: 33 maxItems: 1 34 35 clocks: 36 maxItems: 1 37 38required: 39 - compatible 40 41allOf: 42 - $ref: qcom,rpmh-common.yaml# 43 - if: 44 properties: 45 compatible: 46 contains: 47 enum: 48 - qcom,sdx75-clk-virt 49 - qcom,sdx75-mc-virt 50 then: 51 properties: 52 reg: false 53 else: 54 required: 55 - reg 56 57 - if: 58 properties: 59 compatible: 60 contains: 61 enum: 62 - qcom,sdx75-clk-virt 63 then: 64 properties: 65 clocks: 66 items: 67 - description: RPMH CC QPIC Clock 68 required: 69 - clocks 70 else: 71 properties: 72 clocks: false 73 74unevaluatedProperties: false 75 76examples: 77 - | 78 #include <dt-bindings/clock/qcom,rpmh.h> 79 80 clk_virt: interconnect-0 { 81 compatible = "qcom,sdx75-clk-virt"; 82 #interconnect-cells = <2>; 83 qcom,bcm-voters = <&apps_bcm_voter>; 84 clocks = <&rpmhcc RPMH_QPIC_CLK>; 85 }; 86 87 system_noc: interconnect@1640000 { 88 compatible = "qcom,sdx75-system-noc"; 89 reg = <0x1640000 0x4b400>; 90 #interconnect-cells = <2>; 91 qcom,bcm-voters = <&apps_bcm_voter>; 92 }; 93