1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/interconnect/qcom,msm8996.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm MSM8996 Network-On-Chip interconnect 8 9maintainers: 10 - Konrad Dybcio <konradybcio@kernel.org> 11 12description: | 13 The Qualcomm MSM8996 interconnect providers support adjusting the 14 bandwidth requirements between the various NoC fabrics. 15 16properties: 17 compatible: 18 enum: 19 - qcom,msm8996-a0noc 20 - qcom,msm8996-a1noc 21 - qcom,msm8996-a2noc 22 - qcom,msm8996-bimc 23 - qcom,msm8996-cnoc 24 - qcom,msm8996-mnoc 25 - qcom,msm8996-pnoc 26 - qcom,msm8996-snoc 27 28 reg: 29 maxItems: 1 30 31 clock-names: 32 minItems: 1 33 maxItems: 3 34 35 clocks: 36 minItems: 1 37 maxItems: 3 38 39 power-domains: 40 maxItems: 1 41 42required: 43 - compatible 44 - reg 45 46unevaluatedProperties: false 47 48allOf: 49 - $ref: qcom,rpm-common.yaml# 50 - if: 51 properties: 52 compatible: 53 const: qcom,msm8996-a0noc 54 55 then: 56 properties: 57 clocks: 58 items: 59 - description: Aggregate0 System NoC AXI Clock. 60 - description: Aggregate0 Config NoC AHB Clock. 61 - description: Aggregate0 NoC MPU Clock. 62 63 clock-names: 64 items: 65 - const: aggre0_snoc_axi 66 - const: aggre0_cnoc_ahb 67 - const: aggre0_noc_mpu_cfg 68 69 required: 70 - power-domains 71 72 - if: 73 properties: 74 compatible: 75 const: qcom,msm8996-mnoc 76 77 then: 78 properties: 79 clocks: 80 items: 81 - description: CPU-NoC High-performance Bus Clock. 82 83 clock-names: 84 const: iface 85 86 - if: 87 properties: 88 compatible: 89 const: qcom,msm8996-a2noc 90 91 then: 92 properties: 93 clocks: 94 items: 95 - description: Aggregate2 NoC UFS AXI Clock 96 - description: UFS AXI Clock 97 98 clock-names: 99 items: 100 - const: aggre2_ufs_axi 101 - const: ufs_axi 102 103examples: 104 - | 105 #include <dt-bindings/clock/qcom,gcc-msm8996.h> 106 #include <dt-bindings/clock/qcom,mmcc-msm8996.h> 107 #include <dt-bindings/clock/qcom,rpmcc.h> 108 109 bimc: interconnect@408000 { 110 compatible = "qcom,msm8996-bimc"; 111 reg = <0x00408000 0x5a000>; 112 #interconnect-cells = <1>; 113 }; 114 115 a0noc: interconnect@543000 { 116 compatible = "qcom,msm8996-a0noc"; 117 reg = <0x00543000 0x6000>; 118 #interconnect-cells = <1>; 119 clocks = <&gcc GCC_AGGRE0_SNOC_AXI_CLK>, 120 <&gcc GCC_AGGRE0_CNOC_AHB_CLK>, 121 <&gcc GCC_AGGRE0_NOC_MPU_CFG_AHB_CLK>; 122 clock-names = "aggre0_snoc_axi", 123 "aggre0_cnoc_ahb", 124 "aggre0_noc_mpu_cfg"; 125 power-domains = <&gcc AGGRE0_NOC_GDSC>; 126 }; 127