1* Tegra keyboard controller 2The key controller has maximum 24 pins to make matrix keypad. Any pin 3can be configured as row or column. The maximum column pin can be 8 4and maximum row pins can be 16 for Tegra20/Tegra30. 5 6Required properties: 7- compatible: "nvidia,tegra20-kbc" 8- reg: Register base address of KBC. 9- interrupts: Interrupt number for the KBC. 10- nvidia,kbc-row-pins: The KBC pins which are configured as row. This is an 11 array of pin numbers which is used as rows. 12- nvidia,kbc-col-pins: The KBC pins which are configured as column. This is an 13 array of pin numbers which is used as column. 14- linux,keymap: The keymap for keys as described in the binding document 15 devicetree/bindings/input/matrix-keymap.txt. 16- clocks: Must contain one entry, for the module clock. 17 See ../clocks/clock-bindings.txt for details. 18- resets: Must contain an entry for each entry in reset-names. 19 See ../reset/reset.txt for details. 20- reset-names: Must include the following entries: 21 - kbc 22 23Optional properties, in addition to those specified by the shared 24matrix-keyboard bindings: 25 26- linux,fn-keymap: a second keymap, same specification as the 27 matrix-keyboard-controller spec but to be used when the KEY_FN modifier 28 key is pressed. 29- nvidia,debounce-delay-ms: delay in milliseconds per row scan for debouncing 30- nvidia,repeat-delay-ms: delay in milliseconds before repeat starts 31- nvidia,ghost-filter: enable ghost filtering for this device 32- nvidia,wakeup-source: configure keyboard as a wakeup source for suspend/resume 33 34Example: 35 36keyboard: keyboard { 37 compatible = "nvidia,tegra20-kbc"; 38 reg = <0x7000e200 0x100>; 39 interrupts = <0 85 0x04>; 40 clocks = <&tegra_car 36>; 41 resets = <&tegra_car 36>; 42 reset-names = "kbc"; 43 nvidia,ghost-filter; 44 nvidia,debounce-delay-ms = <640>; 45 nvidia,kbc-row-pins = <0 1 2>; /* pin 0, 1, 2 as rows */ 46 nvidia,kbc-col-pins = <11 12 13>; /* pin 11, 12, 13 as columns */ 47 linux,keymap = <0x00000074 48 0x00010067 49 0x00020066 50 0x01010068 51 0x02000069 52 0x02010070 53 0x02020071>; 54}; 55