139dd2d1eSAnand Ashok Dumbre# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 239dd2d1eSAnand Ashok Dumbre%YAML 1.2 339dd2d1eSAnand Ashok Dumbre--- 439dd2d1eSAnand Ashok Dumbre$id: http://devicetree.org/schemas/iio/adc/xlnx,zynqmp-ams.yaml# 539dd2d1eSAnand Ashok Dumbre$schema: http://devicetree.org/meta-schemas/core.yaml# 639dd2d1eSAnand Ashok Dumbre 739dd2d1eSAnand Ashok Dumbretitle: Xilinx Zynq Ultrascale AMS controller 839dd2d1eSAnand Ashok Dumbre 939dd2d1eSAnand Ashok Dumbremaintainers: 1039dd2d1eSAnand Ashok Dumbre - Anand Ashok Dumbre <anand.ashok.dumbre@xilinx.com> 1139dd2d1eSAnand Ashok Dumbre 1239dd2d1eSAnand Ashok Dumbredescription: | 1339dd2d1eSAnand Ashok Dumbre The AMS (Analog Monitoring System) includes an ADC as well as on-chip sensors 1439dd2d1eSAnand Ashok Dumbre that can be used to sample external voltages and monitor on-die operating 1539dd2d1eSAnand Ashok Dumbre conditions, such as temperature and supply voltage levels. 1639dd2d1eSAnand Ashok Dumbre The AMS has two SYSMON blocks which are PL (Programmable Logic) SYSMON and 1739dd2d1eSAnand Ashok Dumbre PS (Processing System) SYSMON. 1839dd2d1eSAnand Ashok Dumbre All designs should have AMS registers, but PS and PL are optional. The 1939dd2d1eSAnand Ashok Dumbre AMS controller can work with only PS, only PL and both PS and PL 2039dd2d1eSAnand Ashok Dumbre configurations. Please specify registers according to your design. Devicetree 2139dd2d1eSAnand Ashok Dumbre should always have AMS module property. Providing PS & PL module is optional. 2239dd2d1eSAnand Ashok Dumbre 2339dd2d1eSAnand Ashok Dumbre AMS Channel Details 2439dd2d1eSAnand Ashok Dumbre ``````````````````` 2539dd2d1eSAnand Ashok Dumbre Sysmon Block |Channel| Details |Measurement 2639dd2d1eSAnand Ashok Dumbre |Number | |Type 2739dd2d1eSAnand Ashok Dumbre --------------------------------------------------------------------------------------------------------- 2839dd2d1eSAnand Ashok Dumbre AMS CTRL |0 |System PLLs voltage measurement, VCC_PSPLL. |Voltage 2939dd2d1eSAnand Ashok Dumbre |1 |Battery voltage measurement, VCC_PSBATT. |Voltage 3039dd2d1eSAnand Ashok Dumbre |2 |PL Internal voltage measurement, VCCINT. |Voltage 3139dd2d1eSAnand Ashok Dumbre |3 |Block RAM voltage measurement, VCCBRAM. |Voltage 3239dd2d1eSAnand Ashok Dumbre |4 |PL Aux voltage measurement, VCCAUX. |Voltage 3339dd2d1eSAnand Ashok Dumbre |5 |Voltage measurement for six DDR I/O PLLs, VCC_PSDDR_PLL. |Voltage 3439dd2d1eSAnand Ashok Dumbre |6 |VCC_PSINTFP_DDR voltage measurement. |Voltage 3539dd2d1eSAnand Ashok Dumbre --------------------------------------------------------------------------------------------------------- 3639dd2d1eSAnand Ashok Dumbre PS Sysmon |7 |LPD temperature measurement. |Temperature 3739dd2d1eSAnand Ashok Dumbre |8 |FPD temperature measurement (REMOTE). |Temperature 3839dd2d1eSAnand Ashok Dumbre |9 |VCC PS LPD voltage measurement (supply1). |Voltage 3939dd2d1eSAnand Ashok Dumbre |10 |VCC PS FPD voltage measurement (supply2). |Voltage 4039dd2d1eSAnand Ashok Dumbre |11 |PS Aux voltage reference (supply3). |Voltage 4139dd2d1eSAnand Ashok Dumbre |12 |DDR I/O VCC voltage measurement. |Voltage 4239dd2d1eSAnand Ashok Dumbre |13 |PS IO Bank 503 voltage measurement (supply5). |Voltage 4339dd2d1eSAnand Ashok Dumbre |14 |PS IO Bank 500 voltage measurement (supply6). |Voltage 4439dd2d1eSAnand Ashok Dumbre |15 |VCCO_PSIO1 voltage measurement. |Voltage 4539dd2d1eSAnand Ashok Dumbre |16 |VCCO_PSIO2 voltage measurement. |Voltage 4639dd2d1eSAnand Ashok Dumbre |17 |VCC_PS_GTR voltage measurement (VPS_MGTRAVCC). |Voltage 4739dd2d1eSAnand Ashok Dumbre |18 |VTT_PS_GTR voltage measurement (VPS_MGTRAVTT). |Voltage 4839dd2d1eSAnand Ashok Dumbre |19 |VCC_PSADC voltage measurement. |Voltage 4939dd2d1eSAnand Ashok Dumbre --------------------------------------------------------------------------------------------------------- 5039dd2d1eSAnand Ashok Dumbre PL Sysmon |20 |PL temperature measurement. |Temperature 5139dd2d1eSAnand Ashok Dumbre |21 |PL Internal voltage measurement, VCCINT. |Voltage 5239dd2d1eSAnand Ashok Dumbre |22 |PL Auxiliary voltage measurement, VCCAUX. |Voltage 5339dd2d1eSAnand Ashok Dumbre |23 |ADC Reference P+ voltage measurement. |Voltage 5439dd2d1eSAnand Ashok Dumbre |24 |ADC Reference N- voltage measurement. |Voltage 5539dd2d1eSAnand Ashok Dumbre |25 |PL Block RAM voltage measurement, VCCBRAM. |Voltage 5639dd2d1eSAnand Ashok Dumbre |26 |LPD Internal voltage measurement, VCC_PSINTLP (supply4). |Voltage 5739dd2d1eSAnand Ashok Dumbre |27 |FPD Internal voltage measurement, VCC_PSINTFP (supply5). |Voltage 5839dd2d1eSAnand Ashok Dumbre |28 |PS Auxiliary voltage measurement (supply6). |Voltage 5939dd2d1eSAnand Ashok Dumbre |29 |PL VCCADC voltage measurement (vccams). |Voltage 60*47aab533SBjorn Helgaas |30 |Differential analog input signal voltage measurement. |Voltage 6139dd2d1eSAnand Ashok Dumbre |31 |VUser0 voltage measurement (supply7). |Voltage 6239dd2d1eSAnand Ashok Dumbre |32 |VUser1 voltage measurement (supply8). |Voltage 6339dd2d1eSAnand Ashok Dumbre |33 |VUser2 voltage measurement (supply9). |Voltage 6439dd2d1eSAnand Ashok Dumbre |34 |VUser3 voltage measurement (supply10). |Voltage 6539dd2d1eSAnand Ashok Dumbre |35 |Auxiliary ch 0 voltage measurement (VAux0). |Voltage 6639dd2d1eSAnand Ashok Dumbre |36 |Auxiliary ch 1 voltage measurement (VAux1). |Voltage 6739dd2d1eSAnand Ashok Dumbre |37 |Auxiliary ch 2 voltage measurement (VAux2). |Voltage 6839dd2d1eSAnand Ashok Dumbre |38 |Auxiliary ch 3 voltage measurement (VAux3). |Voltage 6939dd2d1eSAnand Ashok Dumbre |39 |Auxiliary ch 4 voltage measurement (VAux4). |Voltage 7039dd2d1eSAnand Ashok Dumbre |40 |Auxiliary ch 5 voltage measurement (VAux5). |Voltage 7139dd2d1eSAnand Ashok Dumbre |41 |Auxiliary ch 6 voltage measurement (VAux6). |Voltage 7239dd2d1eSAnand Ashok Dumbre |42 |Auxiliary ch 7 voltage measurement (VAux7). |Voltage 7339dd2d1eSAnand Ashok Dumbre |43 |Auxiliary ch 8 voltage measurement (VAux8). |Voltage 7439dd2d1eSAnand Ashok Dumbre |44 |Auxiliary ch 9 voltage measurement (VAux9). |Voltage 7539dd2d1eSAnand Ashok Dumbre |45 |Auxiliary ch 10 voltage measurement (VAux10). |Voltage 7639dd2d1eSAnand Ashok Dumbre |46 |Auxiliary ch 11 voltage measurement (VAux11). |Voltage 7739dd2d1eSAnand Ashok Dumbre |47 |Auxiliary ch 12 voltage measurement (VAux12). |Voltage 7839dd2d1eSAnand Ashok Dumbre |48 |Auxiliary ch 13 voltage measurement (VAux13). |Voltage 7939dd2d1eSAnand Ashok Dumbre |49 |Auxiliary ch 14 voltage measurement (VAux14). |Voltage 8039dd2d1eSAnand Ashok Dumbre |50 |Auxiliary ch 15 voltage measurement (VAux15). |Voltage 8139dd2d1eSAnand Ashok Dumbre -------------------------------------------------------------------------------------------------------- 8239dd2d1eSAnand Ashok Dumbre 8339dd2d1eSAnand Ashok Dumbreproperties: 8439dd2d1eSAnand Ashok Dumbre compatible: 8539dd2d1eSAnand Ashok Dumbre enum: 8639dd2d1eSAnand Ashok Dumbre - xlnx,zynqmp-ams 8739dd2d1eSAnand Ashok Dumbre 8839dd2d1eSAnand Ashok Dumbre interrupts: 8939dd2d1eSAnand Ashok Dumbre maxItems: 1 9039dd2d1eSAnand Ashok Dumbre 9139dd2d1eSAnand Ashok Dumbre reg: 9239dd2d1eSAnand Ashok Dumbre description: AMS Controller register space 9339dd2d1eSAnand Ashok Dumbre maxItems: 1 9439dd2d1eSAnand Ashok Dumbre 955165102eSRobert Hancock clocks: 965165102eSRobert Hancock items: 975165102eSRobert Hancock - description: AMS reference clock 985165102eSRobert Hancock 9939dd2d1eSAnand Ashok Dumbre ranges: 10039dd2d1eSAnand Ashok Dumbre description: 10139dd2d1eSAnand Ashok Dumbre Maps the child address space for PS and/or PL. 10239dd2d1eSAnand Ashok Dumbre maxItems: 1 10339dd2d1eSAnand Ashok Dumbre 10439dd2d1eSAnand Ashok Dumbre '#address-cells': 10539dd2d1eSAnand Ashok Dumbre const: 1 10639dd2d1eSAnand Ashok Dumbre 10739dd2d1eSAnand Ashok Dumbre '#size-cells': 10839dd2d1eSAnand Ashok Dumbre const: 1 10939dd2d1eSAnand Ashok Dumbre 11039dd2d1eSAnand Ashok Dumbre '#io-channel-cells': 11139dd2d1eSAnand Ashok Dumbre const: 1 11239dd2d1eSAnand Ashok Dumbre 11339dd2d1eSAnand Ashok Dumbre ams-ps@0: 11439dd2d1eSAnand Ashok Dumbre type: object 11539dd2d1eSAnand Ashok Dumbre description: | 11639dd2d1eSAnand Ashok Dumbre PS (Processing System) SYSMON is memory mapped to PS. This block has 11739dd2d1eSAnand Ashok Dumbre built-in alarm generation logic that is used to interrupt the processor 11839dd2d1eSAnand Ashok Dumbre based on condition set. 11939dd2d1eSAnand Ashok Dumbre 12039dd2d1eSAnand Ashok Dumbre properties: 12139dd2d1eSAnand Ashok Dumbre compatible: 12239dd2d1eSAnand Ashok Dumbre enum: 12339dd2d1eSAnand Ashok Dumbre - xlnx,zynqmp-ams-ps 12439dd2d1eSAnand Ashok Dumbre 12539dd2d1eSAnand Ashok Dumbre reg: 12639dd2d1eSAnand Ashok Dumbre description: Register Space for PS-SYSMON 12739dd2d1eSAnand Ashok Dumbre maxItems: 1 12839dd2d1eSAnand Ashok Dumbre 12939dd2d1eSAnand Ashok Dumbre required: 13039dd2d1eSAnand Ashok Dumbre - compatible 13139dd2d1eSAnand Ashok Dumbre - reg 13239dd2d1eSAnand Ashok Dumbre 13339dd2d1eSAnand Ashok Dumbre additionalProperties: false 13439dd2d1eSAnand Ashok Dumbre 13539dd2d1eSAnand Ashok Dumbre ams-pl@400: 13639dd2d1eSAnand Ashok Dumbre type: object 137c682c963SRob Herring additionalProperties: false 13839dd2d1eSAnand Ashok Dumbre description: 13939dd2d1eSAnand Ashok Dumbre PL-SYSMON is capable of monitoring off chip voltage and temperature. 14039dd2d1eSAnand Ashok Dumbre PL-SYSMON block has DRP, JTAG and I2C interface to enable monitoring 14139dd2d1eSAnand Ashok Dumbre from external master. Out of this interface currently only DRP is 14239dd2d1eSAnand Ashok Dumbre supported. This block has alarm generation logic that is used to 14339dd2d1eSAnand Ashok Dumbre interrupt the processor based on condition set. 14439dd2d1eSAnand Ashok Dumbre 14539dd2d1eSAnand Ashok Dumbre properties: 14639dd2d1eSAnand Ashok Dumbre compatible: 14739dd2d1eSAnand Ashok Dumbre items: 14839dd2d1eSAnand Ashok Dumbre - enum: 14939dd2d1eSAnand Ashok Dumbre - xlnx,zynqmp-ams-pl 15039dd2d1eSAnand Ashok Dumbre 15139dd2d1eSAnand Ashok Dumbre reg: 15239dd2d1eSAnand Ashok Dumbre description: Register Space for PL-SYSMON. 15339dd2d1eSAnand Ashok Dumbre maxItems: 1 15439dd2d1eSAnand Ashok Dumbre 15539dd2d1eSAnand Ashok Dumbre '#address-cells': 15639dd2d1eSAnand Ashok Dumbre const: 1 15739dd2d1eSAnand Ashok Dumbre 15839dd2d1eSAnand Ashok Dumbre '#size-cells': 15939dd2d1eSAnand Ashok Dumbre const: 0 16039dd2d1eSAnand Ashok Dumbre 16139dd2d1eSAnand Ashok Dumbre patternProperties: 16239dd2d1eSAnand Ashok Dumbre "^channel@([2-4][0-9]|50)$": 16339dd2d1eSAnand Ashok Dumbre type: object 16439dd2d1eSAnand Ashok Dumbre description: 16539dd2d1eSAnand Ashok Dumbre Describes the external channels connected. 16639dd2d1eSAnand Ashok Dumbre 16739dd2d1eSAnand Ashok Dumbre properties: 16839dd2d1eSAnand Ashok Dumbre reg: 16939dd2d1eSAnand Ashok Dumbre description: 17039dd2d1eSAnand Ashok Dumbre Pair of pins the channel is connected to. This value is 17139dd2d1eSAnand Ashok Dumbre same as Channel Number for a particular channel. 17239dd2d1eSAnand Ashok Dumbre minimum: 20 17339dd2d1eSAnand Ashok Dumbre maximum: 50 17439dd2d1eSAnand Ashok Dumbre 17539dd2d1eSAnand Ashok Dumbre xlnx,bipolar: 17639dd2d1eSAnand Ashok Dumbre $ref: /schemas/types.yaml#/definitions/flag 17739dd2d1eSAnand Ashok Dumbre type: boolean 17839dd2d1eSAnand Ashok Dumbre description: 17939dd2d1eSAnand Ashok Dumbre If the set channel is used in bipolar mode. 18039dd2d1eSAnand Ashok Dumbre 18139dd2d1eSAnand Ashok Dumbre required: 18239dd2d1eSAnand Ashok Dumbre - reg 18339dd2d1eSAnand Ashok Dumbre 18439dd2d1eSAnand Ashok Dumbre additionalProperties: false 18539dd2d1eSAnand Ashok Dumbre 18639dd2d1eSAnand Ashok Dumbrerequired: 18739dd2d1eSAnand Ashok Dumbre - compatible 18839dd2d1eSAnand Ashok Dumbre - reg 1895165102eSRobert Hancock - clocks 19039dd2d1eSAnand Ashok Dumbre - ranges 19139dd2d1eSAnand Ashok Dumbre 19239dd2d1eSAnand Ashok DumbreadditionalProperties: false 19339dd2d1eSAnand Ashok Dumbre 19439dd2d1eSAnand Ashok Dumbreexamples: 19539dd2d1eSAnand Ashok Dumbre - | 1965165102eSRobert Hancock #include <dt-bindings/clock/xlnx-zynqmp-clk.h> 1975165102eSRobert Hancock 19839dd2d1eSAnand Ashok Dumbre bus { 19939dd2d1eSAnand Ashok Dumbre #address-cells = <2>; 20039dd2d1eSAnand Ashok Dumbre #size-cells = <2>; 20139dd2d1eSAnand Ashok Dumbre 20239dd2d1eSAnand Ashok Dumbre xilinx_ams: ams@ffa50000 { 20339dd2d1eSAnand Ashok Dumbre compatible = "xlnx,zynqmp-ams"; 20439dd2d1eSAnand Ashok Dumbre interrupt-parent = <&gic>; 20539dd2d1eSAnand Ashok Dumbre interrupts = <0 56 4>; 20639dd2d1eSAnand Ashok Dumbre reg = <0x0 0xffa50000 0x0 0x800>; 2075165102eSRobert Hancock clocks = <&zynqmp_clk AMS_REF>; 20839dd2d1eSAnand Ashok Dumbre #address-cells = <1>; 20939dd2d1eSAnand Ashok Dumbre #size-cells = <1>; 21039dd2d1eSAnand Ashok Dumbre #io-channel-cells = <1>; 21139dd2d1eSAnand Ashok Dumbre ranges = <0 0 0xffa50800 0x800>; 21239dd2d1eSAnand Ashok Dumbre 21339dd2d1eSAnand Ashok Dumbre ams_ps: ams-ps@0 { 21439dd2d1eSAnand Ashok Dumbre compatible = "xlnx,zynqmp-ams-ps"; 21539dd2d1eSAnand Ashok Dumbre reg = <0 0x400>; 21639dd2d1eSAnand Ashok Dumbre }; 21739dd2d1eSAnand Ashok Dumbre 21839dd2d1eSAnand Ashok Dumbre ams_pl: ams-pl@400 { 21939dd2d1eSAnand Ashok Dumbre compatible = "xlnx,zynqmp-ams-pl"; 22039dd2d1eSAnand Ashok Dumbre reg = <0x400 0x400>; 22139dd2d1eSAnand Ashok Dumbre #address-cells = <1>; 22239dd2d1eSAnand Ashok Dumbre #size-cells = <0>; 22339dd2d1eSAnand Ashok Dumbre channel@30 { 22439dd2d1eSAnand Ashok Dumbre reg = <30>; 22539dd2d1eSAnand Ashok Dumbre xlnx,bipolar; 22639dd2d1eSAnand Ashok Dumbre }; 22739dd2d1eSAnand Ashok Dumbre channel@31 { 22839dd2d1eSAnand Ashok Dumbre reg = <31>; 22939dd2d1eSAnand Ashok Dumbre }; 23039dd2d1eSAnand Ashok Dumbre channel@38 { 23139dd2d1eSAnand Ashok Dumbre reg = <38>; 23239dd2d1eSAnand Ashok Dumbre xlnx,bipolar; 23339dd2d1eSAnand Ashok Dumbre }; 23439dd2d1eSAnand Ashok Dumbre }; 23539dd2d1eSAnand Ashok Dumbre }; 23639dd2d1eSAnand Ashok Dumbre }; 237