xref: /linux/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml (revision db4a3f0fbedb0398f77b9047e8b8bb2b49f355bb) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/iio/adc/rockchip-saradc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Rockchip Successive Approximation Register (SAR) A/D Converter
8
9maintainers:
10  - Heiko Stuebner <heiko@sntech.de>
11
12properties:
13  compatible:
14    oneOf:
15      - const: rockchip,saradc
16      - const: rockchip,rk3066-tsadc
17      - const: rockchip,rk3399-saradc
18      - const: rockchip,rk3528-saradc
19      - const: rockchip,rk3562-saradc
20      - const: rockchip,rk3588-saradc
21      - items:
22          - const: rockchip,rk3576-saradc
23          - const: rockchip,rk3588-saradc
24      - items:
25          - enum:
26              - rockchip,px30-saradc
27              - rockchip,rk3308-saradc
28              - rockchip,rk3328-saradc
29              - rockchip,rk3568-saradc
30              - rockchip,rv1108-saradc
31              - rockchip,rv1126-saradc
32          - const: rockchip,rk3399-saradc
33
34  reg:
35    maxItems: 1
36
37  interrupts:
38    maxItems: 1
39
40  clocks:
41    items:
42      - description: converter clock
43      - description: peripheral clock
44
45  clock-names:
46    items:
47      - const: saradc
48      - const: apb_pclk
49
50  power-domains:
51    maxItems: 1
52
53  resets:
54    maxItems: 1
55
56  reset-names:
57    const: saradc-apb
58
59  vref-supply:
60    description:
61      The regulator supply for the ADC reference voltage.
62
63  "#io-channel-cells":
64    const: 1
65
66required:
67  - compatible
68  - reg
69  - interrupts
70  - clocks
71  - clock-names
72  - vref-supply
73  - "#io-channel-cells"
74
75additionalProperties: false
76
77examples:
78  - |
79    #include <dt-bindings/clock/rk3288-cru.h>
80    #include <dt-bindings/interrupt-controller/arm-gic.h>
81    saradc: saradc@2006c000 {
82      compatible = "rockchip,saradc";
83      reg = <0x2006c000 0x100>;
84      interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
85      clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
86      clock-names = "saradc", "apb_pclk";
87      resets = <&cru SRST_SARADC>;
88      reset-names = "saradc-apb";
89      vref-supply = <&vcc18>;
90      #io-channel-cells = <1>;
91    };
92