18c412458SJonathan Cameron# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 28c412458SJonathan Cameron%YAML 1.2 38c412458SJonathan Cameron--- 48c412458SJonathan Cameron$id: http://devicetree.org/schemas/iio/adc/renesas,rcar-gyroadc.yaml# 58c412458SJonathan Cameron$schema: http://devicetree.org/meta-schemas/core.yaml# 68c412458SJonathan Cameron 78c412458SJonathan Camerontitle: Renesas R-Car GyroADC 88c412458SJonathan Cameron 98c412458SJonathan Cameronmaintainers: 108c412458SJonathan Cameron - Marek Vasut <marek.vasut+renesas@gmail.com> 118c412458SJonathan Cameron 128c412458SJonathan Camerondescription: | 138c412458SJonathan Cameron The GyroADC block is a reduced SPI block with up to 8 chipselect lines, 148c412458SJonathan Cameron which supports the SPI protocol of a selected few SPI ADCs. The SPI ADCs 158c412458SJonathan Cameron are sampled by the GyroADC block in a round-robin fashion and the result 168c412458SJonathan Cameron presented in the GyroADC registers. 178c412458SJonathan Cameron The ADC bindings should match with that of the devices connected to a 188c412458SJonathan Cameron full featured SPI bus. 198c412458SJonathan Cameron 208c412458SJonathan Cameronproperties: 218c412458SJonathan Cameron compatible: 228c412458SJonathan Cameron items: 238c412458SJonathan Cameron - enum: 248c412458SJonathan Cameron - renesas,r8a7791-gyroadc 258c412458SJonathan Cameron - renesas,r8a7792-gyroadc 268c412458SJonathan Cameron - const: renesas,rcar-gyroadc 278c412458SJonathan Cameron 288c412458SJonathan Cameron reg: 298c412458SJonathan Cameron maxItems: 1 308c412458SJonathan Cameron 318c412458SJonathan Cameron clocks: 328c412458SJonathan Cameron maxItems: 1 338c412458SJonathan Cameron 348c412458SJonathan Cameron clock-names: 358c412458SJonathan Cameron const: fck 368c412458SJonathan Cameron 37cd62d4f3SGeert Uytterhoeven power-domains: 38cd62d4f3SGeert Uytterhoeven maxItems: 1 398c412458SJonathan Cameron 40cd62d4f3SGeert Uytterhoeven resets: 41cd62d4f3SGeert Uytterhoeven maxItems: 1 428c412458SJonathan Cameron 438c412458SJonathan Cameron "#address-cells": 448c412458SJonathan Cameron const: 1 458c412458SJonathan Cameron 468c412458SJonathan Cameron "#size-cells": 478c412458SJonathan Cameron const: 0 488c412458SJonathan Cameron 498c412458SJonathan CameronadditionalProperties: false 508c412458SJonathan Cameron 518c412458SJonathan Cameronrequired: 528c412458SJonathan Cameron - compatible 538c412458SJonathan Cameron - reg 548c412458SJonathan Cameron - clocks 558c412458SJonathan Cameron - clock-names 56cd62d4f3SGeert Uytterhoeven - power-domains 57cd62d4f3SGeert Uytterhoeven - resets 588c412458SJonathan Cameron - "#address-cells" 598c412458SJonathan Cameron - "#size-cells" 608c412458SJonathan Cameron 618c412458SJonathan CameronpatternProperties: 628c412458SJonathan Cameron "@[0-7]$": 638c412458SJonathan Cameron type: object 648c412458SJonathan Cameron properties: 658c412458SJonathan Cameron compatible: 668c412458SJonathan Cameron description: | 678c412458SJonathan Cameron fujitsu,mb88101a 688c412458SJonathan Cameron - Fujitsu MB88101A compatible mode, 698c412458SJonathan Cameron 12bit sampling, up to 4 channels can be sampled in round-robin 708c412458SJonathan Cameron fashion. One Fujitsu chip supplies four GyroADC channels with 718c412458SJonathan Cameron data as it contains four ADCs on the chip and thus for 4-channel 728c412458SJonathan Cameron operation, single MB88101A is required. The Cx chipselect lines 738c412458SJonathan Cameron of the MB88101A connect directly to two CHS lines of the GyroADC, 748c412458SJonathan Cameron no demuxer is required. The data out line of each MB88101A 758c412458SJonathan Cameron connects to a shared input pin of the GyroADC. 768c412458SJonathan Cameron ti,adcs7476 or ti,adc121 or adi,ad7476 778c412458SJonathan Cameron - TI ADCS7476 / TI ADC121 / ADI AD7476 compatible mode, 15bit 788c412458SJonathan Cameron sampling, up to 8 channels can be sampled in round-robin 798c412458SJonathan Cameron fashion. One TI/ADI chip supplies single ADC channel with data, 808c412458SJonathan Cameron thus for 8-channel operation, 8 chips are required. 818c412458SJonathan Cameron A 3:8 chipselect demuxer is required to connect the nCS line 828c412458SJonathan Cameron of the TI/ADI chips to the GyroADC, while MISO line of each 838c412458SJonathan Cameron TI/ADI ADC connects to a shared input pin of the GyroADC. 848c412458SJonathan Cameron maxim,max1162 or maxim,max11100 858c412458SJonathan Cameron - Maxim MAX1162 / Maxim MAX11100 compatible mode, 16bit sampling, 868c412458SJonathan Cameron up to 8 channels can be sampled in round-robin fashion. One 878c412458SJonathan Cameron Maxim chip supplies single ADC channel with data, thus for 888c412458SJonathan Cameron 8-channel operation, 8 chips are required. 898c412458SJonathan Cameron A 3:8 chipselect demuxer is required to connect the nCS line 908c412458SJonathan Cameron of the MAX chips to the GyroADC, while MISO line of each Maxim 918c412458SJonathan Cameron ADC connects to a shared input pin of the GyroADC. 928c412458SJonathan Cameron enum: 93*55720d24SGeert Uytterhoeven - adi,ad7476 948c412458SJonathan Cameron - fujitsu,mb88101a 958c412458SJonathan Cameron - maxim,max1162 968c412458SJonathan Cameron - maxim,max11100 978c412458SJonathan Cameron - ti,adcs7476 988c412458SJonathan Cameron - ti,adc121 998c412458SJonathan Cameron 1008c412458SJonathan Cameron reg: 1018c412458SJonathan Cameron minimum: 0 1028c412458SJonathan Cameron maximum: 7 1038c412458SJonathan Cameron 1048c412458SJonathan Cameron vref-supply: true 1058c412458SJonathan Cameron 1068c412458SJonathan Cameron additionalProperties: false 1078c412458SJonathan Cameron 1088c412458SJonathan Cameron required: 1098c412458SJonathan Cameron - compatible 1108c412458SJonathan Cameron - reg 1118c412458SJonathan Cameron - vref-supply 1128c412458SJonathan Cameron 1138c412458SJonathan Cameronexamples: 1148c412458SJonathan Cameron - | 115cd62d4f3SGeert Uytterhoeven #include <dt-bindings/clock/r8a7791-cpg-mssr.h> 1168c412458SJonathan Cameron #include <dt-bindings/power/r8a7791-sysc.h> 1178c412458SJonathan Cameron 1188c412458SJonathan Cameron adc@e6e54000 { 1198c412458SJonathan Cameron compatible = "renesas,r8a7791-gyroadc", "renesas,rcar-gyroadc"; 120cd62d4f3SGeert Uytterhoeven reg = <0xe6e54000 64>; 121cd62d4f3SGeert Uytterhoeven clocks = <&cpg CPG_MOD 901>; 1228c412458SJonathan Cameron clock-names = "fck"; 1238c412458SJonathan Cameron power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 124cd62d4f3SGeert Uytterhoeven resets = <&cpg 901>; 1258c412458SJonathan Cameron 1268c412458SJonathan Cameron #address-cells = <1>; 1278c412458SJonathan Cameron #size-cells = <0>; 1288c412458SJonathan Cameron 1298c412458SJonathan Cameron adc@0 { 1308c412458SJonathan Cameron reg = <0>; 1318c412458SJonathan Cameron compatible = "maxim,max1162"; 1328c412458SJonathan Cameron vref-supply = <&vref_max1162>; 1338c412458SJonathan Cameron }; 1348c412458SJonathan Cameron 1358c412458SJonathan Cameron adc@1 { 1368c412458SJonathan Cameron reg = <1>; 1378c412458SJonathan Cameron compatible = "maxim,max1162"; 1388c412458SJonathan Cameron vref-supply = <&vref_max1162>; 1398c412458SJonathan Cameron }; 1408c412458SJonathan Cameron }; 1418c412458SJonathan Cameron... 142