1*df2ece7aSMarius Cristea# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2*df2ece7aSMarius Cristea%YAML 1.2 3*df2ece7aSMarius Cristea--- 4*df2ece7aSMarius Cristea$id: http://devicetree.org/schemas/iio/adc/microchip,mcp3564.yaml# 5*df2ece7aSMarius Cristea$schema: http://devicetree.org/meta-schemas/core.yaml# 6*df2ece7aSMarius Cristea 7*df2ece7aSMarius Cristeatitle: Microchip MCP346X and MCP356X ADC Family 8*df2ece7aSMarius Cristea 9*df2ece7aSMarius Cristeamaintainers: 10*df2ece7aSMarius Cristea - Marius Cristea <marius.cristea@microchip.com> 11*df2ece7aSMarius Cristea 12*df2ece7aSMarius Cristeadescription: | 13*df2ece7aSMarius Cristea Bindings for the Microchip family of 153.6 ksps, Low-Noise 16/24-Bit 14*df2ece7aSMarius Cristea Delta-Sigma ADCs with an SPI interface. Datasheet can be found here: 15*df2ece7aSMarius Cristea Datasheet for MCP3561, MCP3562, MCP3564 can be found here: 16*df2ece7aSMarius Cristea https://ww1.microchip.com/downloads/aemDocuments/documents/MSLD/ProductDocuments/DataSheets/MCP3561-2-4-Family-Data-Sheet-DS20006181C.pdf 17*df2ece7aSMarius Cristea Datasheet for MCP3561R, MCP3562R, MCP3564R can be found here: 18*df2ece7aSMarius Cristea https://ww1.microchip.com/downloads/aemDocuments/documents/APID/ProductDocuments/DataSheets/MCP3561_2_4R-Data-Sheet-DS200006391C.pdf 19*df2ece7aSMarius Cristea Datasheet for MCP3461, MCP3462, MCP3464 can be found here: 20*df2ece7aSMarius Cristea https://ww1.microchip.com/downloads/aemDocuments/documents/APID/ProductDocuments/DataSheets/MCP3461-2-4-Two-Four-Eight-Channel-153.6-ksps-Low-Noise-16-Bit-Delta-Sigma-ADC-Data-Sheet-20006180D.pdf 21*df2ece7aSMarius Cristea Datasheet for MCP3461R, MCP3462R, MCP3464R can be found here: 22*df2ece7aSMarius Cristea https://ww1.microchip.com/downloads/aemDocuments/documents/APID/ProductDocuments/DataSheets/MCP3461-2-4R-Family-Data-Sheet-DS20006404C.pdf 23*df2ece7aSMarius Cristea 24*df2ece7aSMarius Cristeaproperties: 25*df2ece7aSMarius Cristea compatible: 26*df2ece7aSMarius Cristea enum: 27*df2ece7aSMarius Cristea - microchip,mcp3461 28*df2ece7aSMarius Cristea - microchip,mcp3462 29*df2ece7aSMarius Cristea - microchip,mcp3464 30*df2ece7aSMarius Cristea - microchip,mcp3461r 31*df2ece7aSMarius Cristea - microchip,mcp3462r 32*df2ece7aSMarius Cristea - microchip,mcp3464r 33*df2ece7aSMarius Cristea - microchip,mcp3561 34*df2ece7aSMarius Cristea - microchip,mcp3562 35*df2ece7aSMarius Cristea - microchip,mcp3564 36*df2ece7aSMarius Cristea - microchip,mcp3561r 37*df2ece7aSMarius Cristea - microchip,mcp3562r 38*df2ece7aSMarius Cristea - microchip,mcp3564r 39*df2ece7aSMarius Cristea 40*df2ece7aSMarius Cristea reg: 41*df2ece7aSMarius Cristea maxItems: 1 42*df2ece7aSMarius Cristea 43*df2ece7aSMarius Cristea spi-max-frequency: 44*df2ece7aSMarius Cristea maximum: 20000000 45*df2ece7aSMarius Cristea 46*df2ece7aSMarius Cristea spi-cpha: true 47*df2ece7aSMarius Cristea 48*df2ece7aSMarius Cristea spi-cpol: true 49*df2ece7aSMarius Cristea 50*df2ece7aSMarius Cristea vdd-supply: true 51*df2ece7aSMarius Cristea 52*df2ece7aSMarius Cristea avdd-supply: true 53*df2ece7aSMarius Cristea 54*df2ece7aSMarius Cristea clocks: 55*df2ece7aSMarius Cristea description: 56*df2ece7aSMarius Cristea Phandle and clock identifier for external sampling clock. 57*df2ece7aSMarius Cristea If not specified, the internal crystal oscillator will be used. 58*df2ece7aSMarius Cristea maxItems: 1 59*df2ece7aSMarius Cristea 60*df2ece7aSMarius Cristea interrupts: 61*df2ece7aSMarius Cristea description: IRQ line of the ADC 62*df2ece7aSMarius Cristea maxItems: 1 63*df2ece7aSMarius Cristea 64*df2ece7aSMarius Cristea drive-open-drain: 65*df2ece7aSMarius Cristea description: 66*df2ece7aSMarius Cristea Whether to drive the IRQ signal as push-pull (default) or open-drain. Note 67*df2ece7aSMarius Cristea that the device requires this pin to become "high", otherwise it will stop 68*df2ece7aSMarius Cristea converting. 69*df2ece7aSMarius Cristea type: boolean 70*df2ece7aSMarius Cristea 71*df2ece7aSMarius Cristea vref-supply: 72*df2ece7aSMarius Cristea description: 73*df2ece7aSMarius Cristea Some devices have a specific reference voltage supplied on a different 74*df2ece7aSMarius Cristea pin to the other supplies. Needed to be able to establish channel scaling 75*df2ece7aSMarius Cristea unless there is also an internal reference available (e.g. mcp3564r). In 76*df2ece7aSMarius Cristea case of "r" devices (e. g. mcp3564r), if it does not exists the internal 77*df2ece7aSMarius Cristea reference will be used. 78*df2ece7aSMarius Cristea 79*df2ece7aSMarius Cristea microchip,hw-device-address: 80*df2ece7aSMarius Cristea $ref: /schemas/types.yaml#/definitions/uint32 81*df2ece7aSMarius Cristea minimum: 0 82*df2ece7aSMarius Cristea maximum: 3 83*df2ece7aSMarius Cristea description: 84*df2ece7aSMarius Cristea The address is set on a per-device basis by fuses in the factory, 85*df2ece7aSMarius Cristea configured on request. If not requested, the fuses are set for 0x1. 86*df2ece7aSMarius Cristea The device address is part of the device markings to avoid 87*df2ece7aSMarius Cristea potential confusion. This address is coded on two bits, so four possible 88*df2ece7aSMarius Cristea addresses are available when multiple devices are present on the same 89*df2ece7aSMarius Cristea SPI bus with only one Chip Select line for all devices. 90*df2ece7aSMarius Cristea Each device communication starts by a CS falling edge, followed by the 91*df2ece7aSMarius Cristea clocking of the device address (BITS[7:6] - top two bits of COMMAND BYTE 92*df2ece7aSMarius Cristea which is first one on the wire). 93*df2ece7aSMarius Cristea 94*df2ece7aSMarius Cristea "#io-channel-cells": 95*df2ece7aSMarius Cristea const: 1 96*df2ece7aSMarius Cristea 97*df2ece7aSMarius Cristea "#address-cells": 98*df2ece7aSMarius Cristea const: 1 99*df2ece7aSMarius Cristea 100*df2ece7aSMarius Cristea "#size-cells": 101*df2ece7aSMarius Cristea const: 0 102*df2ece7aSMarius Cristea 103*df2ece7aSMarius CristeapatternProperties: 104*df2ece7aSMarius Cristea "^channel@([0-9]|([1-7][0-9]))$": 105*df2ece7aSMarius Cristea $ref: adc.yaml 106*df2ece7aSMarius Cristea type: object 107*df2ece7aSMarius Cristea unevaluatedProperties: false 108*df2ece7aSMarius Cristea description: Represents the external channels which are connected to the ADC. 109*df2ece7aSMarius Cristea 110*df2ece7aSMarius Cristea properties: 111*df2ece7aSMarius Cristea reg: 112*df2ece7aSMarius Cristea description: The channel number in single-ended and differential mode. 113*df2ece7aSMarius Cristea minimum: 0 114*df2ece7aSMarius Cristea maximum: 79 115*df2ece7aSMarius Cristea 116*df2ece7aSMarius Cristea required: 117*df2ece7aSMarius Cristea - reg 118*df2ece7aSMarius Cristea 119*df2ece7aSMarius Cristeadependencies: 120*df2ece7aSMarius Cristea spi-cpol: [ spi-cpha ] 121*df2ece7aSMarius Cristea spi-cpha: [ spi-cpol ] 122*df2ece7aSMarius Cristea 123*df2ece7aSMarius Cristearequired: 124*df2ece7aSMarius Cristea - compatible 125*df2ece7aSMarius Cristea - reg 126*df2ece7aSMarius Cristea - microchip,hw-device-address 127*df2ece7aSMarius Cristea - spi-max-frequency 128*df2ece7aSMarius Cristea 129*df2ece7aSMarius CristeaallOf: 130*df2ece7aSMarius Cristea - $ref: /schemas/spi/spi-peripheral-props.yaml# 131*df2ece7aSMarius Cristea - # External vref, no internal reference 132*df2ece7aSMarius Cristea if: 133*df2ece7aSMarius Cristea properties: 134*df2ece7aSMarius Cristea compatible: 135*df2ece7aSMarius Cristea contains: 136*df2ece7aSMarius Cristea enum: 137*df2ece7aSMarius Cristea - microchip,mcp3461 138*df2ece7aSMarius Cristea - microchip,mcp3462 139*df2ece7aSMarius Cristea - microchip,mcp3464 140*df2ece7aSMarius Cristea - microchip,mcp3561 141*df2ece7aSMarius Cristea - microchip,mcp3562 142*df2ece7aSMarius Cristea - microchip,mcp3564 143*df2ece7aSMarius Cristea then: 144*df2ece7aSMarius Cristea required: 145*df2ece7aSMarius Cristea - vref-supply 146*df2ece7aSMarius Cristea 147*df2ece7aSMarius CristeaunevaluatedProperties: false 148*df2ece7aSMarius Cristea 149*df2ece7aSMarius Cristeaexamples: 150*df2ece7aSMarius Cristea - | 151*df2ece7aSMarius Cristea spi { 152*df2ece7aSMarius Cristea #address-cells = <1>; 153*df2ece7aSMarius Cristea #size-cells = <0>; 154*df2ece7aSMarius Cristea 155*df2ece7aSMarius Cristea adc@0 { 156*df2ece7aSMarius Cristea compatible = "microchip,mcp3564r"; 157*df2ece7aSMarius Cristea reg = <0>; 158*df2ece7aSMarius Cristea vref-supply = <&vref_reg>; 159*df2ece7aSMarius Cristea spi-cpha; 160*df2ece7aSMarius Cristea spi-cpol; 161*df2ece7aSMarius Cristea spi-max-frequency = <10000000>; 162*df2ece7aSMarius Cristea microchip,hw-device-address = <1>; 163*df2ece7aSMarius Cristea 164*df2ece7aSMarius Cristea #address-cells = <1>; 165*df2ece7aSMarius Cristea #size-cells = <0>; 166*df2ece7aSMarius Cristea 167*df2ece7aSMarius Cristea channel@0 { 168*df2ece7aSMarius Cristea /* CH0 to AGND */ 169*df2ece7aSMarius Cristea reg = <0>; 170*df2ece7aSMarius Cristea label = "CH0"; 171*df2ece7aSMarius Cristea }; 172*df2ece7aSMarius Cristea 173*df2ece7aSMarius Cristea channel@1 { 174*df2ece7aSMarius Cristea /* CH1 to AGND */ 175*df2ece7aSMarius Cristea reg = <1>; 176*df2ece7aSMarius Cristea label = "CH1"; 177*df2ece7aSMarius Cristea }; 178*df2ece7aSMarius Cristea 179*df2ece7aSMarius Cristea /* diff-channels */ 180*df2ece7aSMarius Cristea channel@11 { 181*df2ece7aSMarius Cristea reg = <11>; 182*df2ece7aSMarius Cristea 183*df2ece7aSMarius Cristea /* CN0, CN1 */ 184*df2ece7aSMarius Cristea diff-channels = <0 1>; 185*df2ece7aSMarius Cristea label = "CH0_CH1"; 186*df2ece7aSMarius Cristea }; 187*df2ece7aSMarius Cristea 188*df2ece7aSMarius Cristea channel@22 { 189*df2ece7aSMarius Cristea reg = <0x22>; 190*df2ece7aSMarius Cristea 191*df2ece7aSMarius Cristea /* CN1, CN2 */ 192*df2ece7aSMarius Cristea diff-channels = <1 2>; 193*df2ece7aSMarius Cristea label = "CH1_CH3"; 194*df2ece7aSMarius Cristea }; 195*df2ece7aSMarius Cristea 196*df2ece7aSMarius Cristea channel@23 { 197*df2ece7aSMarius Cristea reg = <0x23>; 198*df2ece7aSMarius Cristea 199*df2ece7aSMarius Cristea /* CN1, CN3 */ 200*df2ece7aSMarius Cristea diff-channels = <1 3>; 201*df2ece7aSMarius Cristea label = "CH1_CH3"; 202*df2ece7aSMarius Cristea }; 203*df2ece7aSMarius Cristea }; 204*df2ece7aSMarius Cristea }; 205*df2ece7aSMarius Cristea... 206