xref: /linux/Documentation/devicetree/bindings/iio/adc/mediatek,mt2701-auxadc.yaml (revision 9f771739a04919226081a107167596de75108fbb) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/iio/adc/mediatek,mt2701-auxadc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Mediatek AUXADC - ADC on Mediatek mobile SoC (mt65xx/mt81xx/mt27xx)
8
9maintainers:
10  - Zhiyong Tao <zhiyong.tao@mediatek.com>
11  - Matthias Brugger <matthias.bgg@gmail.com>
12
13description: |
14  The Auxiliary Analog/Digital Converter (AUXADC) is an ADC found
15  in some Mediatek SoCs which among other things measures the temperatures
16  in the SoC. It can be used directly with register accesses, but it is also
17  used by thermal controller which reads the temperatures from the AUXADC
18  directly via its own bus interface. See mediatek-thermal bindings
19  for the Thermal Controller which holds a phandle to the AUXADC.
20
21properties:
22  compatible:
23    oneOf:
24      - enum:
25          - mediatek,mt2701-auxadc
26          - mediatek,mt2712-auxadc
27          - mediatek,mt6765-auxadc
28          - mediatek,mt7622-auxadc
29          - mediatek,mt7986-auxadc
30          - mediatek,mt8173-auxadc
31      - items:
32          - enum:
33              - mediatek,mt7623-auxadc
34          - const: mediatek,mt2701-auxadc
35      - items:
36          - enum:
37              - mediatek,mt8183-auxadc
38              - mediatek,mt8186-auxadc
39              - mediatek,mt8188-auxadc
40              - mediatek,mt8195-auxadc
41              - mediatek,mt8516-auxadc
42          - const: mediatek,mt8173-auxadc
43
44  reg:
45    maxItems: 1
46
47  clocks:
48    maxItems: 1
49
50  clock-names:
51    const: main
52
53  "#io-channel-cells":
54    const: 1
55
56additionalProperties: false
57
58required:
59  - compatible
60  - reg
61  - clocks
62  - clock-names
63  - "#io-channel-cells"
64
65examples:
66  - |
67    #include <dt-bindings/clock/mt8183-clk.h>
68    soc {
69        #address-cells = <2>;
70        #size-cells = <2>;
71
72        adc@11001000 {
73            compatible = "mediatek,mt8183-auxadc",
74                         "mediatek,mt8173-auxadc";
75            reg = <0 0x11001000 0 0x1000>;
76            clocks = <&infracfg CLK_INFRA_AUXADC>;
77            clock-names = "main";
78            #io-channel-cells = <1>;
79        };
80    };
81...
82