xref: /linux/Documentation/devicetree/bindings/iio/adc/brcm,iproc-static-adc.yaml (revision 8be98d2f2a0a262f8bf8a0bc1fdf522b3c7aab17)
1*25b49a31SJonathan Cameron# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2*25b49a31SJonathan Cameron%YAML 1.2
3*25b49a31SJonathan Cameron---
4*25b49a31SJonathan Cameron$id: http://devicetree.org/schemas/iio/adc/brcm,iproc-static-adc.yaml#
5*25b49a31SJonathan Cameron$schema: http://devicetree.org/meta-schemas/core.yaml#
6*25b49a31SJonathan Cameron
7*25b49a31SJonathan Camerontitle: Broadcom's IPROC Static ADC controller
8*25b49a31SJonathan Cameron
9*25b49a31SJonathan Cameronmaintainers:
10*25b49a31SJonathan Cameron  - Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
11*25b49a31SJonathan Cameron
12*25b49a31SJonathan Camerondescription: |
13*25b49a31SJonathan Cameron  Broadcom iProc ADC controller has 8 10bit channels
14*25b49a31SJonathan Cameron
15*25b49a31SJonathan Cameronproperties:
16*25b49a31SJonathan Cameron  compatible:
17*25b49a31SJonathan Cameron    const: brcm,iproc-static-adc
18*25b49a31SJonathan Cameron
19*25b49a31SJonathan Cameron  adc-syscon:
20*25b49a31SJonathan Cameron    $ref: /schemas/types.yaml#/definitions/phandle
21*25b49a31SJonathan Cameron    description:
22*25b49a31SJonathan Cameron      syscon node defining physical base address of the controller and length
23*25b49a31SJonathan Cameron      of memory mapped region.
24*25b49a31SJonathan Cameron
25*25b49a31SJonathan Cameron  "#io-channel-cells":
26*25b49a31SJonathan Cameron    const: 1
27*25b49a31SJonathan Cameron
28*25b49a31SJonathan Cameron  clocks:
29*25b49a31SJonathan Cameron    maxItems: 1
30*25b49a31SJonathan Cameron
31*25b49a31SJonathan Cameron  clock-names:
32*25b49a31SJonathan Cameron    const: tsc_clk
33*25b49a31SJonathan Cameron
34*25b49a31SJonathan Cameron  interrupts:
35*25b49a31SJonathan Cameron    maxItems: 1
36*25b49a31SJonathan Cameron
37*25b49a31SJonathan CameronadditionalProperties: false
38*25b49a31SJonathan Cameron
39*25b49a31SJonathan Cameronrequired:
40*25b49a31SJonathan Cameron  - compatible
41*25b49a31SJonathan Cameron  - adc-syscon
42*25b49a31SJonathan Cameron  - "#io-channel-cells"
43*25b49a31SJonathan Cameron  - clocks
44*25b49a31SJonathan Cameron  - clock-names
45*25b49a31SJonathan Cameron  - interrupts
46*25b49a31SJonathan Cameron
47*25b49a31SJonathan Cameronexamples:
48*25b49a31SJonathan Cameron  - |
49*25b49a31SJonathan Cameron    #include <dt-bindings/clock/bcm-cygnus.h>
50*25b49a31SJonathan Cameron    #include <dt-bindings/interrupt-controller/arm-gic.h>
51*25b49a31SJonathan Cameron    #include <dt-bindings/interrupt-controller/irq.h>
52*25b49a31SJonathan Cameron    soc {
53*25b49a31SJonathan Cameron        #address-cells = <1>;
54*25b49a31SJonathan Cameron        #size-cells = <1>;
55*25b49a31SJonathan Cameron
56*25b49a31SJonathan Cameron        adc {
57*25b49a31SJonathan Cameron            compatible = "brcm,iproc-static-adc";
58*25b49a31SJonathan Cameron            adc-syscon = <&ts_adc_syscon>;
59*25b49a31SJonathan Cameron            #io-channel-cells = <1>;
60*25b49a31SJonathan Cameron            clocks = <&asiu_clks BCM_CYGNUS_ASIU_ADC_CLK>;
61*25b49a31SJonathan Cameron            clock-names = "tsc_clk";
62*25b49a31SJonathan Cameron            interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
63*25b49a31SJonathan Cameron        };
64*25b49a31SJonathan Cameron    };
65*25b49a31SJonathan Cameron...
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