1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/iio/adc/amlogic,meson-saradc.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Amlogic Meson SAR (Successive Approximation Register) A/D converter 8 9maintainers: 10 - Martin Blumenstingl <martin.blumenstingl@googlemail.com> 11 12description: 13 Binding covers a range of ADCs found on Amlogic Meson SoCs. 14 15properties: 16 compatible: 17 oneOf: 18 - const: amlogic,meson-saradc 19 - items: 20 - enum: 21 - amlogic,meson8-saradc 22 - amlogic,meson8b-saradc 23 - amlogic,meson8m2-saradc 24 - amlogic,meson-gxbb-saradc 25 - amlogic,meson-gxl-saradc 26 - amlogic,meson-gxlx-saradc 27 - amlogic,meson-gxm-saradc 28 - amlogic,meson-axg-saradc 29 - amlogic,meson-g12a-saradc 30 - const: amlogic,meson-saradc 31 32 reg: 33 maxItems: 1 34 35 interrupts: 36 description: Interrupt indicates end of sampling. 37 maxItems: 1 38 39 clocks: 40 minItems: 2 41 maxItems: 4 42 43 clock-names: 44 minItems: 2 45 items: 46 - const: clkin 47 - const: core 48 - const: adc_clk 49 - const: adc_sel 50 51 vref-supply: true 52 53 "#io-channel-cells": 54 const: 1 55 56 amlogic,hhi-sysctrl: 57 $ref: /schemas/types.yaml#/definitions/phandle 58 description: 59 Syscon which contains the 5th bit of the TSC (temperature sensor 60 coefficient) on Meson8b and Meson8m2 (which used to calibrate the 61 temperature sensor) 62 63 nvmem-cells: 64 description: phandle to the temperature_calib eFuse cells 65 maxItems: 1 66 67 nvmem-cell-names: 68 const: temperature_calib 69 70 power-domains: 71 maxItems: 1 72 73allOf: 74 - if: 75 properties: 76 compatible: 77 contains: 78 enum: 79 - amlogic,meson8-saradc 80 - amlogic,meson8b-saradc 81 - amlogic,meson8m2-saradc 82 then: 83 properties: 84 clocks: 85 maxItems: 2 86 clock-names: 87 maxItems: 2 88 else: 89 properties: 90 nvmem-cells: false 91 mvmem-cel-names: false 92 clocks: 93 minItems: 4 94 clock-names: 95 minItems: 4 96 97 - if: 98 properties: 99 compatible: 100 contains: 101 enum: 102 - amlogic,meson8-saradc 103 - amlogic,meson8b-saradc 104 - amlogic,meson8m2-saradc 105 then: 106 properties: 107 amlogic,hhi-sysctrl: true 108 else: 109 properties: 110 amlogic,hhi-sysctrl: false 111 112required: 113 - compatible 114 - reg 115 - interrupts 116 - clocks 117 - clock-names 118 - "#io-channel-cells" 119 120additionalProperties: false 121 122examples: 123 - | 124 #include <dt-bindings/interrupt-controller/irq.h> 125 #include <dt-bindings/clock/gxbb-clkc.h> 126 #include <dt-bindings/interrupt-controller/arm-gic.h> 127 soc { 128 #address-cells = <2>; 129 #size-cells = <2>; 130 adc@8680 { 131 compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc"; 132 #io-channel-cells = <1>; 133 reg = <0x0 0x8680 0x0 0x34>; 134 interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>; 135 clocks = <&xtal>, 136 <&clkc CLKID_SAR_ADC>, 137 <&clkc CLKID_SAR_ADC_CLK>, 138 <&clkc CLKID_SAR_ADC_SEL>; 139 clock-names = "clkin", "core", "adc_clk", "adc_sel"; 140 }; 141 adc@9680 { 142 compatible = "amlogic,meson8b-saradc", "amlogic,meson-saradc"; 143 #io-channel-cells = <1>; 144 reg = <0x0 0x9680 0x0 0x34>; 145 interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>; 146 clocks = <&xtal>, <&clkc CLKID_SAR_ADC>; 147 clock-names = "clkin", "core"; 148 nvmem-cells = <&tsens_caldata>; 149 nvmem-cell-names = "temperature_calib"; 150 amlogic,hhi-sysctrl = <&hhi>; 151 }; 152 }; 153... 154