1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/iio/adc/amlogic,meson-saradc.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Amlogic Meson SAR (Successive Approximation Register) A/D converter 8 9maintainers: 10 - Martin Blumenstingl <martin.blumenstingl@googlemail.com> 11 12description: 13 Binding covers a range of ADCs found on Amlogic Meson SoCs. 14 15properties: 16 compatible: 17 oneOf: 18 - const: amlogic,meson-saradc 19 - items: 20 - enum: 21 - amlogic,meson8-saradc 22 - amlogic,meson8b-saradc 23 - amlogic,meson8m2-saradc 24 - amlogic,meson-gxbb-saradc 25 - amlogic,meson-gxl-saradc 26 - amlogic,meson-gxm-saradc 27 - amlogic,meson-axg-saradc 28 - amlogic,meson-g12a-saradc 29 - const: amlogic,meson-saradc 30 31 reg: 32 maxItems: 1 33 34 interrupts: 35 description: Interrupt indicates end of sampling. 36 maxItems: 1 37 38 clocks: 39 minItems: 2 40 maxItems: 4 41 42 clock-names: 43 minItems: 2 44 items: 45 - const: clkin 46 - const: core 47 - const: adc_clk 48 - const: adc_sel 49 50 vref-supply: true 51 52 "#io-channel-cells": 53 const: 1 54 55 amlogic,hhi-sysctrl: 56 $ref: /schemas/types.yaml#/definitions/phandle 57 description: 58 Syscon which contains the 5th bit of the TSC (temperature sensor 59 coefficient) on Meson8b and Meson8m2 (which used to calibrate the 60 temperature sensor) 61 62 nvmem-cells: 63 description: phandle to the temperature_calib eFuse cells 64 maxItems: 1 65 66 nvmem-cell-names: 67 const: temperature_calib 68 69 power-domains: 70 maxItems: 1 71 72allOf: 73 - if: 74 properties: 75 compatible: 76 contains: 77 enum: 78 - amlogic,meson8-saradc 79 - amlogic,meson8b-saradc 80 - amlogic,meson8m2-saradc 81 then: 82 properties: 83 clocks: 84 maxItems: 2 85 clock-names: 86 maxItems: 2 87 else: 88 properties: 89 nvmem-cells: false 90 mvmem-cel-names: false 91 clocks: 92 minItems: 4 93 clock-names: 94 minItems: 4 95 96 - if: 97 properties: 98 compatible: 99 contains: 100 enum: 101 - amlogic,meson8-saradc 102 - amlogic,meson8b-saradc 103 - amlogic,meson8m2-saradc 104 then: 105 properties: 106 amlogic,hhi-sysctrl: true 107 else: 108 properties: 109 amlogic,hhi-sysctrl: false 110 111required: 112 - compatible 113 - reg 114 - interrupts 115 - clocks 116 - clock-names 117 - "#io-channel-cells" 118 119additionalProperties: false 120 121examples: 122 - | 123 #include <dt-bindings/interrupt-controller/irq.h> 124 #include <dt-bindings/clock/gxbb-clkc.h> 125 #include <dt-bindings/interrupt-controller/arm-gic.h> 126 soc { 127 #address-cells = <2>; 128 #size-cells = <2>; 129 adc@8680 { 130 compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc"; 131 #io-channel-cells = <1>; 132 reg = <0x0 0x8680 0x0 0x34>; 133 interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>; 134 clocks = <&xtal>, 135 <&clkc CLKID_SAR_ADC>, 136 <&clkc CLKID_SAR_ADC_CLK>, 137 <&clkc CLKID_SAR_ADC_SEL>; 138 clock-names = "clkin", "core", "adc_clk", "adc_sel"; 139 }; 140 adc@9680 { 141 compatible = "amlogic,meson8b-saradc", "amlogic,meson-saradc"; 142 #io-channel-cells = <1>; 143 reg = <0x0 0x9680 0x0 0x34>; 144 interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>; 145 clocks = <&xtal>, <&clkc CLKID_SAR_ADC>; 146 clock-names = "clkin", "core"; 147 nvmem-cells = <&tsens_caldata>; 148 nvmem-cell-names = "temperature_calib"; 149 amlogic,hhi-sysctrl = <&hhi>; 150 }; 151 }; 152... 153