xref: /linux/Documentation/devicetree/bindings/iio/adc/allwinner,sun20i-d1-gpadc.yaml (revision d5859510d35d8e7d63fed5169f1775317f40fb03) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/iio/adc/allwinner,sun20i-d1-gpadc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Allwinner D1 General Purpose ADC
8
9maintainers:
10  - Maksim Kiselev <bigunclemax@gmail.com>
11
12properties:
13  compatible:
14    oneOf:
15      - enum:
16          - allwinner,sun20i-d1-gpadc
17      - items:
18          - enum:
19              - allwinner,sun50i-h616-gpadc
20          - const: allwinner,sun20i-d1-gpadc
21
22  "#io-channel-cells":
23    const: 1
24
25  "#address-cells":
26    const: 1
27
28  "#size-cells":
29    const: 0
30
31  clocks:
32    maxItems: 1
33
34  interrupts:
35    maxItems: 1
36
37  reg:
38    maxItems: 1
39
40  resets:
41    maxItems: 1
42
43patternProperties:
44  "^channel@[0-9a-f]+$":
45    $ref: adc.yaml
46    type: object
47    description:
48      Represents the internal channels of the ADC.
49
50    properties:
51      reg:
52        items:
53          minimum: 0
54          maximum: 15
55
56    required:
57      - reg
58
59    unevaluatedProperties: false
60
61required:
62  - "#io-channel-cells"
63  - clocks
64  - compatible
65  - interrupts
66  - reg
67  - resets
68
69additionalProperties: false
70
71examples:
72  - |
73    #include <dt-bindings/clock/sun20i-d1-ccu.h>
74    #include <dt-bindings/reset/sun20i-d1-ccu.h>
75    #include <dt-bindings/interrupt-controller/irq.h>
76
77    gpadc: adc@2009000 {
78        compatible = "allwinner,sun20i-d1-gpadc";
79        reg = <0x2009000 0x400>;
80        clocks = <&ccu CLK_BUS_GPADC>;
81        resets = <&ccu RST_BUS_GPADC>;
82        interrupts = <73 IRQ_TYPE_LEVEL_HIGH>;
83        #io-channel-cells = <1>;
84
85        #address-cells = <1>;
86        #size-cells = <0>;
87
88        channel@0 {
89            reg = <0>;
90        };
91
92        channel@1 {
93            reg = <1>;
94        };
95    };
96...
97