xref: /linux/Documentation/devicetree/bindings/iio/adc/adi,axi-adc.yaml (revision 184e56e77c06a7eef68a021e9d4b11a11a8ab096) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/iio/adc/adi,axi-adc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Analog Devices AXI ADC IP core
8
9maintainers:
10  - Michael Hennerich <michael.hennerich@analog.com>
11
12description: |
13  Analog Devices Generic AXI ADC IP core for interfacing an ADC device
14  with a high speed serial (JESD204B/C) or source synchronous parallel
15  interface (LVDS/CMOS).
16  Usually, some other interface type (i.e SPI) is used as a control
17  interface for the actual ADC, while this IP core will interface
18  to the data-lines of the ADC and handle the streaming of data into
19  memory via DMA.
20  In some cases, the AXI ADC interface is used to perform specialized
21  operation to a particular ADC, e.g access the physical bus through
22  specific registers to write ADC registers.
23  In this case, we use a different compatible which indicates the target
24  IP core's name.
25  The following IP is currently supported:
26    - AXI AD7606x: specialized version of the IP core for all the chips from
27      the ad7606 family.
28
29  https://wiki.analog.com/resources/fpga/docs/axi_adc_ip
30  https://analogdevicesinc.github.io/hdl/library/axi_ad485x/index.html
31  http://analogdevicesinc.github.io/hdl/library/axi_ad7606x/index.html
32
33properties:
34  compatible:
35    enum:
36      - adi,axi-adc-10.0.a
37      - adi,axi-ad7606x
38      - adi,axi-ad485x
39
40  reg:
41    maxItems: 1
42
43  clocks:
44    maxItems: 1
45
46  dmas:
47    maxItems: 1
48
49  dma-names:
50    items:
51      - const: rx
52
53  adi,adc-dev:
54    $ref: /schemas/types.yaml#/definitions/phandle
55    description:
56      A reference to a the actual ADC to which this FPGA ADC interfaces to.
57    deprecated: true
58
59  '#io-backend-cells':
60    const: 0
61
62  '#address-cells':
63    const: 1
64
65  '#size-cells':
66    const: 0
67
68patternProperties:
69  "^adc@[0-9a-f]+$":
70    type: object
71    properties:
72      reg:
73        maxItems: 1
74    additionalProperties: true
75    required:
76      - compatible
77      - reg
78
79required:
80  - compatible
81  - dmas
82  - reg
83  - clocks
84
85allOf:
86  - if:
87      properties:
88        compatible:
89          not:
90            contains:
91              const: adi,axi-ad7606x
92    then:
93      properties:
94        '#address-cells': false
95        '#size-cells': false
96      patternProperties:
97        "^adc@[0-9a-f]+$": false
98
99additionalProperties: false
100
101examples:
102  - |
103    adc@44a00000 {
104        compatible = "adi,axi-adc-10.0.a";
105        reg = <0x44a00000 0x10000>;
106        dmas = <&rx_dma 0>;
107        dma-names = "rx";
108        clocks = <&axi_clk>;
109        #io-backend-cells = <0>;
110    };
111  - |
112    #include <dt-bindings/gpio/gpio.h>
113    parallel_bus_controller@44a00000 {
114        compatible = "adi,axi-ad7606x";
115        reg = <0x44a00000 0x10000>;
116        dmas = <&rx_dma 0>;
117        dma-names = "rx";
118        clocks = <&ext_clk>;
119        #address-cells = <1>;
120        #size-cells = <0>;
121
122        adc@0 {
123            compatible = "adi,ad7606b";
124            reg = <0>;
125            pwms = <&axi_pwm_gen 0 0>;
126            pwm-names = "convst1";
127            avcc-supply = <&adc_vref>;
128            vdrive-supply = <&vdd_supply>;
129            reset-gpios = <&gpio0 91 GPIO_ACTIVE_HIGH>;
130            standby-gpios = <&gpio0 90 GPIO_ACTIVE_LOW>;
131            adi,range-gpios = <&gpio0 89 GPIO_ACTIVE_HIGH>;
132            adi,oversampling-ratio-gpios = <&gpio0 88 GPIO_ACTIVE_HIGH
133                            &gpio0 87 GPIO_ACTIVE_HIGH
134                            &gpio0 86 GPIO_ACTIVE_HIGH>;
135            io-backends = <&parallel_bus_controller>;
136        };
137    };
138...
139