196553a44SAlexandru Ardelean# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 296553a44SAlexandru Ardelean%YAML 1.2 396553a44SAlexandru Ardelean--- 496553a44SAlexandru Ardelean$id: http://devicetree.org/schemas/iio/adc/adi,axi-adc.yaml# 596553a44SAlexandru Ardelean$schema: http://devicetree.org/meta-schemas/core.yaml# 696553a44SAlexandru Ardelean 796553a44SAlexandru Ardeleantitle: Analog Devices AXI ADC IP core 896553a44SAlexandru Ardelean 996553a44SAlexandru Ardeleanmaintainers: 1096553a44SAlexandru Ardelean - Michael Hennerich <michael.hennerich@analog.com> 1196553a44SAlexandru Ardelean 1296553a44SAlexandru Ardeleandescription: | 1396553a44SAlexandru Ardelean Analog Devices Generic AXI ADC IP core for interfacing an ADC device 1496553a44SAlexandru Ardelean with a high speed serial (JESD204B/C) or source synchronous parallel 1596553a44SAlexandru Ardelean interface (LVDS/CMOS). 1696553a44SAlexandru Ardelean Usually, some other interface type (i.e SPI) is used as a control 1796553a44SAlexandru Ardelean interface for the actual ADC, while this IP core will interface 1896553a44SAlexandru Ardelean to the data-lines of the ADC and handle the streaming of data into 1996553a44SAlexandru Ardelean memory via DMA. 2096553a44SAlexandru Ardelean 2196553a44SAlexandru Ardelean https://wiki.analog.com/resources/fpga/docs/axi_adc_ip 2296553a44SAlexandru Ardelean 2396553a44SAlexandru Ardeleanproperties: 2496553a44SAlexandru Ardelean compatible: 2596553a44SAlexandru Ardelean enum: 2696553a44SAlexandru Ardelean - adi,axi-adc-10.0.a 2796553a44SAlexandru Ardelean 2896553a44SAlexandru Ardelean reg: 2996553a44SAlexandru Ardelean maxItems: 1 3096553a44SAlexandru Ardelean 31*19fb11d7SNuno Sa clocks: 32*19fb11d7SNuno Sa maxItems: 1 33*19fb11d7SNuno Sa 3496553a44SAlexandru Ardelean dmas: 3596553a44SAlexandru Ardelean maxItems: 1 3696553a44SAlexandru Ardelean 3796553a44SAlexandru Ardelean dma-names: 3896553a44SAlexandru Ardelean items: 3996553a44SAlexandru Ardelean - const: rx 4096553a44SAlexandru Ardelean 4196553a44SAlexandru Ardelean adi,adc-dev: 4296553a44SAlexandru Ardelean $ref: /schemas/types.yaml#/definitions/phandle 4396553a44SAlexandru Ardelean description: 4496553a44SAlexandru Ardelean A reference to a the actual ADC to which this FPGA ADC interfaces to. 45a032b921SNuno Sa deprecated: true 46a032b921SNuno Sa 47a032b921SNuno Sa '#io-backend-cells': 48a032b921SNuno Sa const: 0 4996553a44SAlexandru Ardelean 5096553a44SAlexandru Ardeleanrequired: 5196553a44SAlexandru Ardelean - compatible 5296553a44SAlexandru Ardelean - dmas 5396553a44SAlexandru Ardelean - reg 54*19fb11d7SNuno Sa - clocks 5596553a44SAlexandru Ardelean 5696553a44SAlexandru ArdeleanadditionalProperties: false 5796553a44SAlexandru Ardelean 5896553a44SAlexandru Ardeleanexamples: 5996553a44SAlexandru Ardelean - | 6096553a44SAlexandru Ardelean axi-adc@44a00000 { 6196553a44SAlexandru Ardelean compatible = "adi,axi-adc-10.0.a"; 6296553a44SAlexandru Ardelean reg = <0x44a00000 0x10000>; 6396553a44SAlexandru Ardelean dmas = <&rx_dma 0>; 6496553a44SAlexandru Ardelean dma-names = "rx"; 65*19fb11d7SNuno Sa clocks = <&axi_clk>; 66a032b921SNuno Sa #io-backend-cells = <0>; 6796553a44SAlexandru Ardelean }; 6896553a44SAlexandru Ardelean... 69