xref: /linux/Documentation/devicetree/bindings/iio/adc/adi,ad4080.yaml (revision 0d5ec7919f3747193f051036b2301734a4b5e1d6)
1*232fb5c8SAntoniu Miclaus# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*232fb5c8SAntoniu Miclaus# Copyright 2025 Analog Devices Inc.
3*232fb5c8SAntoniu Miclaus%YAML 1.2
4*232fb5c8SAntoniu Miclaus---
5*232fb5c8SAntoniu Miclaus$id: http://devicetree.org/schemas/iio/adc/adi,ad4080.yaml#
6*232fb5c8SAntoniu Miclaus$schema: http://devicetree.org/meta-schemas/core.yaml#
7*232fb5c8SAntoniu Miclaus
8*232fb5c8SAntoniu Miclaustitle: Analog Devices AD4080 20-Bit, 40 MSPS, Differential SAR ADC
9*232fb5c8SAntoniu Miclaus
10*232fb5c8SAntoniu Miclausmaintainers:
11*232fb5c8SAntoniu Miclaus  - Antoniu Miclaus <antoniu.miclaus@analog.com>
12*232fb5c8SAntoniu Miclaus
13*232fb5c8SAntoniu Miclausdescription: |
14*232fb5c8SAntoniu Miclaus  The AD4080 is a high speed, low noise, low distortion, 20-bit, Easy Drive,
15*232fb5c8SAntoniu Miclaus  successive approximation register (SAR) analog-to-digital converter (ADC).
16*232fb5c8SAntoniu Miclaus  Maintaining high performance (signal-to-noise and distortion (SINAD) ratio
17*232fb5c8SAntoniu Miclaus  > 90 dBFS) at signal frequencies in excess of 1 MHz enables the AD4080 to
18*232fb5c8SAntoniu Miclaus  service a wide variety of precision, wide bandwidth data acquisition
19*232fb5c8SAntoniu Miclaus  applications.
20*232fb5c8SAntoniu Miclaus
21*232fb5c8SAntoniu Miclaus  https://www.analog.com/media/en/technical-documentation/data-sheets/ad4080.pdf
22*232fb5c8SAntoniu Miclaus
23*232fb5c8SAntoniu Miclaus$ref: /schemas/spi/spi-peripheral-props.yaml#
24*232fb5c8SAntoniu Miclaus
25*232fb5c8SAntoniu Miclausproperties:
26*232fb5c8SAntoniu Miclaus  compatible:
27*232fb5c8SAntoniu Miclaus    enum:
28*232fb5c8SAntoniu Miclaus      - adi,ad4080
29*232fb5c8SAntoniu Miclaus
30*232fb5c8SAntoniu Miclaus  reg:
31*232fb5c8SAntoniu Miclaus    maxItems: 1
32*232fb5c8SAntoniu Miclaus
33*232fb5c8SAntoniu Miclaus  spi-max-frequency:
34*232fb5c8SAntoniu Miclaus    description: Configuration of the SPI bus.
35*232fb5c8SAntoniu Miclaus    maximum: 50000000
36*232fb5c8SAntoniu Miclaus
37*232fb5c8SAntoniu Miclaus  clocks:
38*232fb5c8SAntoniu Miclaus    maxItems: 1
39*232fb5c8SAntoniu Miclaus
40*232fb5c8SAntoniu Miclaus  clock-names:
41*232fb5c8SAntoniu Miclaus    items:
42*232fb5c8SAntoniu Miclaus      - const: cnv
43*232fb5c8SAntoniu Miclaus
44*232fb5c8SAntoniu Miclaus  vdd33-supply: true
45*232fb5c8SAntoniu Miclaus
46*232fb5c8SAntoniu Miclaus  vdd11-supply: true
47*232fb5c8SAntoniu Miclaus
48*232fb5c8SAntoniu Miclaus  vddldo-supply: true
49*232fb5c8SAntoniu Miclaus
50*232fb5c8SAntoniu Miclaus  iovdd-supply: true
51*232fb5c8SAntoniu Miclaus
52*232fb5c8SAntoniu Miclaus  vrefin-supply: true
53*232fb5c8SAntoniu Miclaus
54*232fb5c8SAntoniu Miclaus  io-backends:
55*232fb5c8SAntoniu Miclaus    maxItems: 1
56*232fb5c8SAntoniu Miclaus
57*232fb5c8SAntoniu Miclaus  adi,lvds-cnv-enable:
58*232fb5c8SAntoniu Miclaus    description: Enable the LVDS signal type on the CNV pin. Default is CMOS.
59*232fb5c8SAntoniu Miclaus    type: boolean
60*232fb5c8SAntoniu Miclaus
61*232fb5c8SAntoniu Miclaus  adi,num-lanes:
62*232fb5c8SAntoniu Miclaus    description:
63*232fb5c8SAntoniu Miclaus      Number of lanes on which the data is sent on the output (DA, DB pins).
64*232fb5c8SAntoniu Miclaus    $ref: /schemas/types.yaml#/definitions/uint32
65*232fb5c8SAntoniu Miclaus    enum: [1, 2]
66*232fb5c8SAntoniu Miclaus    default: 1
67*232fb5c8SAntoniu Miclaus
68*232fb5c8SAntoniu Miclausrequired:
69*232fb5c8SAntoniu Miclaus  - compatible
70*232fb5c8SAntoniu Miclaus  - reg
71*232fb5c8SAntoniu Miclaus  - clocks
72*232fb5c8SAntoniu Miclaus  - clock-names
73*232fb5c8SAntoniu Miclaus  - vdd33-supply
74*232fb5c8SAntoniu Miclaus  - vrefin-supply
75*232fb5c8SAntoniu Miclaus
76*232fb5c8SAntoniu MiclausadditionalProperties: false
77*232fb5c8SAntoniu Miclaus
78*232fb5c8SAntoniu Miclausexamples:
79*232fb5c8SAntoniu Miclaus  - |
80*232fb5c8SAntoniu Miclaus    spi {
81*232fb5c8SAntoniu Miclaus        #address-cells = <1>;
82*232fb5c8SAntoniu Miclaus        #size-cells = <0>;
83*232fb5c8SAntoniu Miclaus
84*232fb5c8SAntoniu Miclaus        adc@0 {
85*232fb5c8SAntoniu Miclaus          compatible = "adi,ad4080";
86*232fb5c8SAntoniu Miclaus          reg = <0>;
87*232fb5c8SAntoniu Miclaus          spi-max-frequency = <10000000>;
88*232fb5c8SAntoniu Miclaus          vdd33-supply = <&vdd33>;
89*232fb5c8SAntoniu Miclaus          vddldo-supply = <&vddldo>;
90*232fb5c8SAntoniu Miclaus          vrefin-supply = <&vrefin>;
91*232fb5c8SAntoniu Miclaus          clocks = <&cnv>;
92*232fb5c8SAntoniu Miclaus          clock-names = "cnv";
93*232fb5c8SAntoniu Miclaus          io-backends = <&iio_backend>;
94*232fb5c8SAntoniu Miclaus        };
95*232fb5c8SAntoniu Miclaus    };
96*232fb5c8SAntoniu Miclaus...
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