1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2# Copyright 2019 Analog Devices Inc. 3%YAML 1.2 4--- 5$id: http://devicetree.org/schemas/iio/adc/adi,ad7192.yaml# 6$schema: http://devicetree.org/meta-schemas/core.yaml# 7 8title: Analog Devices AD7192 ADC device driver 9 10maintainers: 11 - Michael Hennerich <michael.hennerich@analog.com> 12 13description: | 14 Bindings for the Analog Devices AD7192 ADC device. Datasheet can be 15 found here: 16 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7192.pdf 17 18properties: 19 compatible: 20 enum: 21 - adi,ad7190 22 - adi,ad7192 23 - adi,ad7193 24 - adi,ad7194 25 - adi,ad7195 26 27 "#address-cells": 28 const: 1 29 30 "#size-cells": 31 const: 0 32 33 reg: 34 maxItems: 1 35 36 spi-cpol: true 37 38 spi-cpha: true 39 40 clocks: 41 maxItems: 1 42 description: phandle to the master clock (mclk) 43 44 clock-names: 45 items: 46 - const: mclk 47 48 interrupts: 49 maxItems: 1 50 51 aincom-supply: 52 description: | 53 AINCOM voltage supply. Analog inputs AINx are referenced to this input 54 when configured for pseudo-differential operation. 55 56 dvdd-supply: 57 description: DVdd voltage supply 58 59 avdd-supply: 60 description: AVdd voltage supply 61 62 vref-supply: 63 description: VRef voltage supply 64 65 adi,rejection-60-Hz-enable: 66 description: | 67 This bit enables a notch at 60 Hz when the first notch of the sinc 68 filter is at 50 Hz. When REJ60 is set, a filter notch is placed at 69 60 Hz when the sinc filter first notch is at 50 Hz. This allows 70 simultaneous 50 Hz/ 60 Hz rejection. 71 type: boolean 72 73 adi,refin2-pins-enable: 74 description: | 75 External reference applied between the P1/REFIN2(+) and P0/REFIN2(−) pins. 76 type: boolean 77 78 adi,buffer-enable: 79 description: | 80 Enables the buffer on the analog inputs. If cleared, the analog inputs 81 are unbuffered, lowering the power consumption of the device. If this 82 bit is set, the analog inputs are buffered, allowing the user to place 83 source impedances on the front end without contributing gain errors to 84 the system. 85 type: boolean 86 87 adi,burnout-currents-enable: 88 description: | 89 When this bit is set to 1, the 500 nA current sources in the signal 90 path are enabled. When BURN = 0, the burnout currents are disabled. 91 The burnout currents can be enabled only when the buffer is active 92 and when chop is disabled. 93 type: boolean 94 95 bipolar: 96 description: see Documentation/devicetree/bindings/iio/adc/adc.yaml 97 type: boolean 98 99patternProperties: 100 "^channel@[0-9a-f]+$": 101 type: object 102 $ref: adc.yaml 103 unevaluatedProperties: false 104 105 properties: 106 reg: 107 description: The channel index. 108 minimum: 0 109 maximum: 271 110 111 diff-channels: 112 description: 113 Both inputs can be connected to pins AIN1 to AIN16 by choosing the 114 appropriate value from 1 to 16. 115 items: 116 minimum: 1 117 maximum: 16 118 119 single-channel: 120 description: 121 Positive input can be connected to pins AIN1 to AIN16 by choosing the 122 appropriate value from 1 to 16. Negative input is connected to AINCOM. 123 minimum: 1 124 maximum: 16 125 126 oneOf: 127 - required: 128 - reg 129 - diff-channels 130 - required: 131 - reg 132 - single-channel 133 134required: 135 - compatible 136 - reg 137 - clocks 138 - clock-names 139 - interrupts 140 - dvdd-supply 141 - avdd-supply 142 - vref-supply 143 - spi-cpol 144 - spi-cpha 145 146allOf: 147 - $ref: /schemas/spi/spi-peripheral-props.yaml# 148 - if: 149 properties: 150 compatible: 151 enum: 152 - adi,ad7190 153 - adi,ad7192 154 - adi,ad7193 155 - adi,ad7195 156 then: 157 patternProperties: 158 "^channel@[0-9a-f]+$": false 159 160unevaluatedProperties: false 161 162examples: 163 - | 164 spi { 165 #address-cells = <1>; 166 #size-cells = <0>; 167 168 adc@0 { 169 compatible = "adi,ad7192"; 170 reg = <0>; 171 spi-max-frequency = <1000000>; 172 spi-cpol; 173 spi-cpha; 174 clocks = <&ad7192_mclk>; 175 clock-names = "mclk"; 176 interrupts = <25 0x2>; 177 interrupt-parent = <&gpio>; 178 aincom-supply = <&aincom>; 179 dvdd-supply = <&dvdd>; 180 avdd-supply = <&avdd>; 181 vref-supply = <&vref>; 182 183 adi,refin2-pins-enable; 184 adi,rejection-60-Hz-enable; 185 adi,buffer-enable; 186 adi,burnout-currents-enable; 187 }; 188 }; 189 - | 190 spi { 191 #address-cells = <1>; 192 #size-cells = <0>; 193 194 adc@0 { 195 compatible = "adi,ad7194"; 196 reg = <0>; 197 198 #address-cells = <1>; 199 #size-cells = <0>; 200 201 spi-max-frequency = <1000000>; 202 spi-cpol; 203 spi-cpha; 204 clocks = <&ad7192_mclk>; 205 clock-names = "mclk"; 206 interrupts = <25 0x2>; 207 interrupt-parent = <&gpio>; 208 aincom-supply = <&aincom>; 209 dvdd-supply = <&dvdd>; 210 avdd-supply = <&avdd>; 211 vref-supply = <&vref>; 212 213 channel@0 { 214 reg = <0>; 215 diff-channels = <1 6>; 216 }; 217 218 channel@1 { 219 reg = <1>; 220 single-channel = <1>; 221 }; 222 }; 223 }; 224