13d50d03fSDumitru Ceclan# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 23d50d03fSDumitru Ceclan# Copyright 2023 Analog Devices Inc. 33d50d03fSDumitru Ceclan%YAML 1.2 43d50d03fSDumitru Ceclan--- 53d50d03fSDumitru Ceclan$id: http://devicetree.org/schemas/iio/adc/adi,ad7173.yaml# 63d50d03fSDumitru Ceclan$schema: http://devicetree.org/meta-schemas/core.yaml# 73d50d03fSDumitru Ceclan 83d50d03fSDumitru Ceclantitle: Analog Devices AD7173 ADC 93d50d03fSDumitru Ceclan 103d50d03fSDumitru Ceclanmaintainers: 113d50d03fSDumitru Ceclan - Ceclan Dumitru <dumitru.ceclan@analog.com> 123d50d03fSDumitru Ceclan 133d50d03fSDumitru Ceclandescription: | 143d50d03fSDumitru Ceclan Analog Devices AD717x ADC's: 153d50d03fSDumitru Ceclan The AD717x family offer a complete integrated Sigma-Delta ADC solution which 163d50d03fSDumitru Ceclan can be used in high precision, low noise single channel applications 173d50d03fSDumitru Ceclan (Life Science measurements) or higher speed multiplexed applications 183d50d03fSDumitru Ceclan (Factory Automation PLC Input modules). The Sigma-Delta ADC is intended 193d50d03fSDumitru Ceclan primarily for measurement of signals close to DC but also delivers 203d50d03fSDumitru Ceclan outstanding performance with input bandwidths out to ~10kHz. 213d50d03fSDumitru Ceclan 22*561b5d5bSDumitru Ceclan Analog Devices AD411x ADC's: 23*561b5d5bSDumitru Ceclan The AD411X family encompasses a series of low power, low noise, 24-bit, 24*561b5d5bSDumitru Ceclan sigma-delta analog-to-digital converters that offer a versatile range of 25*561b5d5bSDumitru Ceclan specifications. They integrate an analog front end suitable for processing 26*561b5d5bSDumitru Ceclan fully differential/single-ended and bipolar voltage inputs. 27*561b5d5bSDumitru Ceclan 283d50d03fSDumitru Ceclan Datasheets for supported chips: 29*561b5d5bSDumitru Ceclan https://www.analog.com/media/en/technical-documentation/data-sheets/AD4111.pdf 30*561b5d5bSDumitru Ceclan https://www.analog.com/media/en/technical-documentation/data-sheets/AD4112.pdf 31*561b5d5bSDumitru Ceclan https://www.analog.com/media/en/technical-documentation/data-sheets/AD4114.pdf 32*561b5d5bSDumitru Ceclan https://www.analog.com/media/en/technical-documentation/data-sheets/AD4115.pdf 33*561b5d5bSDumitru Ceclan https://www.analog.com/media/en/technical-documentation/data-sheets/AD4116.pdf 343d50d03fSDumitru Ceclan https://www.analog.com/media/en/technical-documentation/data-sheets/AD7172-2.pdf 3588a1ffc6SDumitru Ceclan https://www.analog.com/media/en/technical-documentation/data-sheets/AD7172-4.pdf 363d50d03fSDumitru Ceclan https://www.analog.com/media/en/technical-documentation/data-sheets/AD7173-8.pdf 373d50d03fSDumitru Ceclan https://www.analog.com/media/en/technical-documentation/data-sheets/AD7175-2.pdf 3888a1ffc6SDumitru Ceclan https://www.analog.com/media/en/technical-documentation/data-sheets/AD7175-8.pdf 393d50d03fSDumitru Ceclan https://www.analog.com/media/en/technical-documentation/data-sheets/AD7176-2.pdf 4088a1ffc6SDumitru Ceclan https://www.analog.com/media/en/technical-documentation/data-sheets/AD7177-2.pdf 413d50d03fSDumitru Ceclan 423d50d03fSDumitru Ceclanproperties: 433d50d03fSDumitru Ceclan compatible: 443d50d03fSDumitru Ceclan enum: 45*561b5d5bSDumitru Ceclan - adi,ad4111 46*561b5d5bSDumitru Ceclan - adi,ad4112 47*561b5d5bSDumitru Ceclan - adi,ad4114 48*561b5d5bSDumitru Ceclan - adi,ad4115 49*561b5d5bSDumitru Ceclan - adi,ad4116 503d50d03fSDumitru Ceclan - adi,ad7172-2 5188a1ffc6SDumitru Ceclan - adi,ad7172-4 523d50d03fSDumitru Ceclan - adi,ad7173-8 533d50d03fSDumitru Ceclan - adi,ad7175-2 5488a1ffc6SDumitru Ceclan - adi,ad7175-8 553d50d03fSDumitru Ceclan - adi,ad7176-2 5688a1ffc6SDumitru Ceclan - adi,ad7177-2 573d50d03fSDumitru Ceclan 583d50d03fSDumitru Ceclan reg: 593d50d03fSDumitru Ceclan maxItems: 1 603d50d03fSDumitru Ceclan 613d50d03fSDumitru Ceclan interrupts: 623d50d03fSDumitru Ceclan minItems: 1 633d50d03fSDumitru Ceclan items: 643d50d03fSDumitru Ceclan - description: | 653d50d03fSDumitru Ceclan Ready: multiplexed with SPI data out. While SPI CS is low, 663d50d03fSDumitru Ceclan can be used to indicate the completion of a conversion. 673d50d03fSDumitru Ceclan 683d50d03fSDumitru Ceclan - description: | 693d50d03fSDumitru Ceclan Error: The three error bits in the status register (ADC_ERROR, CRC_ERROR, 703d50d03fSDumitru Ceclan and REG_ERROR) are OR'ed, inverted, and mapped to the ERROR pin. 713d50d03fSDumitru Ceclan Therefore, the ERROR pin indicates that an error has occurred. 723d50d03fSDumitru Ceclan 733d50d03fSDumitru Ceclan interrupt-names: 743d50d03fSDumitru Ceclan minItems: 1 753d50d03fSDumitru Ceclan items: 763d50d03fSDumitru Ceclan - const: rdy 773d50d03fSDumitru Ceclan - const: err 783d50d03fSDumitru Ceclan 793d50d03fSDumitru Ceclan '#address-cells': 803d50d03fSDumitru Ceclan const: 1 813d50d03fSDumitru Ceclan 823d50d03fSDumitru Ceclan '#size-cells': 833d50d03fSDumitru Ceclan const: 0 843d50d03fSDumitru Ceclan 853d50d03fSDumitru Ceclan spi-max-frequency: 863d50d03fSDumitru Ceclan maximum: 20000000 873d50d03fSDumitru Ceclan 883d50d03fSDumitru Ceclan gpio-controller: 893d50d03fSDumitru Ceclan description: Marks the device node as a GPIO controller. 903d50d03fSDumitru Ceclan 913d50d03fSDumitru Ceclan '#gpio-cells': 923d50d03fSDumitru Ceclan const: 2 933d50d03fSDumitru Ceclan description: 943d50d03fSDumitru Ceclan The first cell is the GPIO number and the second cell specifies 953d50d03fSDumitru Ceclan GPIO flags, as defined in <dt-bindings/gpio/gpio.h>. 963d50d03fSDumitru Ceclan 973d50d03fSDumitru Ceclan vref-supply: 983d50d03fSDumitru Ceclan description: | 993d50d03fSDumitru Ceclan Differential external reference supply used for conversion. The reference 1003d50d03fSDumitru Ceclan voltage (Vref) specified here must be the voltage difference between the 1013d50d03fSDumitru Ceclan REF+ and REF- pins: Vref = (REF+) - (REF-). 1023d50d03fSDumitru Ceclan 1033d50d03fSDumitru Ceclan vref2-supply: 1043d50d03fSDumitru Ceclan description: | 1053d50d03fSDumitru Ceclan Differential external reference supply used for conversion. The reference 1063d50d03fSDumitru Ceclan voltage (Vref2) specified here must be the voltage difference between the 1073d50d03fSDumitru Ceclan REF2+ and REF2- pins: Vref2 = (REF2+) - (REF2-). 1083d50d03fSDumitru Ceclan 1093d50d03fSDumitru Ceclan avdd-supply: 1103d50d03fSDumitru Ceclan description: Avdd supply, can be used as reference for conversion. 1113d50d03fSDumitru Ceclan This supply is referenced to AVSS, voltage specified here 1123d50d03fSDumitru Ceclan represents (AVDD1 - AVSS). 1133d50d03fSDumitru Ceclan 1143d50d03fSDumitru Ceclan avdd2-supply: 1153d50d03fSDumitru Ceclan description: Avdd2 supply, used as the input to the internal voltage regulator. 1163d50d03fSDumitru Ceclan This supply is referenced to AVSS, voltage specified here 1173d50d03fSDumitru Ceclan represents (AVDD2 - AVSS). 1183d50d03fSDumitru Ceclan 1193d50d03fSDumitru Ceclan iovdd-supply: 1203d50d03fSDumitru Ceclan description: iovdd supply, used for the chip digital interface. 1213d50d03fSDumitru Ceclan 1223d50d03fSDumitru Ceclan clocks: 1233d50d03fSDumitru Ceclan maxItems: 1 1243d50d03fSDumitru Ceclan description: | 1253d50d03fSDumitru Ceclan Optional external clock source. Can include one clock source: external 1263d50d03fSDumitru Ceclan clock or external crystal. 1273d50d03fSDumitru Ceclan 1283d50d03fSDumitru Ceclan clock-names: 1293d50d03fSDumitru Ceclan enum: 1303d50d03fSDumitru Ceclan - ext-clk 1313d50d03fSDumitru Ceclan - xtal 1323d50d03fSDumitru Ceclan 1333d50d03fSDumitru Ceclan '#clock-cells': 1343d50d03fSDumitru Ceclan const: 0 1353d50d03fSDumitru Ceclan 1363d50d03fSDumitru CeclanpatternProperties: 1373d50d03fSDumitru Ceclan "^channel@[0-9a-f]$": 1383d50d03fSDumitru Ceclan type: object 1393d50d03fSDumitru Ceclan $ref: adc.yaml 1403d50d03fSDumitru Ceclan unevaluatedProperties: false 1413d50d03fSDumitru Ceclan 1423d50d03fSDumitru Ceclan properties: 1433d50d03fSDumitru Ceclan reg: 1443d50d03fSDumitru Ceclan minimum: 0 1453d50d03fSDumitru Ceclan maximum: 15 1463d50d03fSDumitru Ceclan 1473d50d03fSDumitru Ceclan diff-channels: 148*561b5d5bSDumitru Ceclan description: | 149*561b5d5bSDumitru Ceclan This property is used for defining the inputs of a differential 150*561b5d5bSDumitru Ceclan voltage channel. The first value is the positive input and the second 151*561b5d5bSDumitru Ceclan value is the negative input of the channel. 152*561b5d5bSDumitru Ceclan 153*561b5d5bSDumitru Ceclan Family AD411x supports a dedicated VINCOM voltage input. 154*561b5d5bSDumitru Ceclan To select it set the second channel to 16. 155*561b5d5bSDumitru Ceclan (VIN2, VINCOM) -> diff-channels = <2 16> 156*561b5d5bSDumitru Ceclan 157*561b5d5bSDumitru Ceclan There are special values that can be selected besides the voltage 158*561b5d5bSDumitru Ceclan analog inputs: 159*561b5d5bSDumitru Ceclan 21: REF+ 160*561b5d5bSDumitru Ceclan 22: REF− 161*561b5d5bSDumitru Ceclan 162*561b5d5bSDumitru Ceclan Supported only by AD7172-2, AD7172-4, AD7175-2, AD7175-8, AD7177-2, 163*561b5d5bSDumitru Ceclan must be paired together and can be used to monitor the power supply 164*561b5d5bSDumitru Ceclan of the ADC: 165*561b5d5bSDumitru Ceclan 19: ((AVDD1 − AVSS)/5)+ 166*561b5d5bSDumitru Ceclan 20: ((AVDD1 − AVSS)/5)− 167*561b5d5bSDumitru Ceclan 1683d50d03fSDumitru Ceclan items: 1693d50d03fSDumitru Ceclan minimum: 0 1703d50d03fSDumitru Ceclan maximum: 31 1713d50d03fSDumitru Ceclan 172*561b5d5bSDumitru Ceclan single-channel: 173*561b5d5bSDumitru Ceclan description: | 174*561b5d5bSDumitru Ceclan This property is used for defining a current channel or the positive 175*561b5d5bSDumitru Ceclan input of a voltage channel (single-ended or pseudo-differential). 176*561b5d5bSDumitru Ceclan 177*561b5d5bSDumitru Ceclan Models AD4111 and AD4112 support current channels. 178*561b5d5bSDumitru Ceclan Example: (IIN2+, IIN2−) -> single-channel = <2> 179*561b5d5bSDumitru Ceclan To correctly configure a current channel set the "adi,current-channel" 180*561b5d5bSDumitru Ceclan property to true. 181*561b5d5bSDumitru Ceclan 182*561b5d5bSDumitru Ceclan To configure a single-ended/pseudo-differential channel set the 183*561b5d5bSDumitru Ceclan "common-mode-channel" property to the desired negative voltage input. 184*561b5d5bSDumitru Ceclan 185*561b5d5bSDumitru Ceclan When used as a voltage channel, special inputs are valid as well. 186*561b5d5bSDumitru Ceclan minimum: 0 187*561b5d5bSDumitru Ceclan maximum: 31 188*561b5d5bSDumitru Ceclan 189*561b5d5bSDumitru Ceclan common-mode-channel: 190*561b5d5bSDumitru Ceclan description: 191*561b5d5bSDumitru Ceclan This property is used for defining the negative input of a 192*561b5d5bSDumitru Ceclan single-ended or pseudo-differential voltage channel. 193*561b5d5bSDumitru Ceclan 194*561b5d5bSDumitru Ceclan Special inputs are valid as well. 195*561b5d5bSDumitru Ceclan minimum: 0 196*561b5d5bSDumitru Ceclan maximum: 31 197*561b5d5bSDumitru Ceclan 1983d50d03fSDumitru Ceclan adi,reference-select: 1993d50d03fSDumitru Ceclan description: | 2003d50d03fSDumitru Ceclan Select the reference source to use when converting on 2013d50d03fSDumitru Ceclan the specific channel. Valid values are: 2023d50d03fSDumitru Ceclan vref : REF+ /REF− 2033d50d03fSDumitru Ceclan vref2 : REF2+ /REF2− 2043d50d03fSDumitru Ceclan refout-avss: REFOUT/AVSS (Internal reference) 2053d50d03fSDumitru Ceclan avdd : AVDD /AVSS 2063d50d03fSDumitru Ceclan 20788a1ffc6SDumitru Ceclan External reference ref2 only available on ad7173-8 and ad7172-4. 20888a1ffc6SDumitru Ceclan Internal reference refout-avss not available on ad7172-4. 20988a1ffc6SDumitru Ceclan 21088a1ffc6SDumitru Ceclan If not specified, internal reference used (if available). 2113d50d03fSDumitru Ceclan $ref: /schemas/types.yaml#/definitions/string 2123d50d03fSDumitru Ceclan enum: 2133d50d03fSDumitru Ceclan - vref 2143d50d03fSDumitru Ceclan - vref2 2153d50d03fSDumitru Ceclan - refout-avss 2163d50d03fSDumitru Ceclan - avdd 2173d50d03fSDumitru Ceclan default: refout-avss 2183d50d03fSDumitru Ceclan 219*561b5d5bSDumitru Ceclan adi,current-channel: 220*561b5d5bSDumitru Ceclan $ref: /schemas/types.yaml#/definitions/flag 221*561b5d5bSDumitru Ceclan description: | 222*561b5d5bSDumitru Ceclan Signal that the selected inputs are current channels. 223*561b5d5bSDumitru Ceclan Only available on AD4111 and AD4112. 224*561b5d5bSDumitru Ceclan 2253d50d03fSDumitru Ceclan required: 2263d50d03fSDumitru Ceclan - reg 227*561b5d5bSDumitru Ceclan 228*561b5d5bSDumitru Ceclan allOf: 229*561b5d5bSDumitru Ceclan - oneOf: 230*561b5d5bSDumitru Ceclan - required: [single-channel] 231*561b5d5bSDumitru Ceclan properties: 232*561b5d5bSDumitru Ceclan diff-channels: false 233*561b5d5bSDumitru Ceclan - required: [diff-channels] 234*561b5d5bSDumitru Ceclan properties: 235*561b5d5bSDumitru Ceclan single-channel: false 236*561b5d5bSDumitru Ceclan adi,current-channel: false 237*561b5d5bSDumitru Ceclan common-mode-channel: false 238*561b5d5bSDumitru Ceclan 239*561b5d5bSDumitru Ceclan - if: 240*561b5d5bSDumitru Ceclan required: [common-mode-channel] 241*561b5d5bSDumitru Ceclan then: 242*561b5d5bSDumitru Ceclan properties: 243*561b5d5bSDumitru Ceclan adi,current-channel: false 2443d50d03fSDumitru Ceclan 2453d50d03fSDumitru Ceclanrequired: 2463d50d03fSDumitru Ceclan - compatible 2473d50d03fSDumitru Ceclan - reg 2483d50d03fSDumitru Ceclan 2493d50d03fSDumitru CeclanallOf: 2503d50d03fSDumitru Ceclan - $ref: /schemas/spi/spi-peripheral-props.yaml# 2513d50d03fSDumitru Ceclan 25288a1ffc6SDumitru Ceclan # Only ad7172-4, ad7173-8 and ad7175-8 support vref2 2533d50d03fSDumitru Ceclan - if: 2543d50d03fSDumitru Ceclan properties: 2553d50d03fSDumitru Ceclan compatible: 2563d50d03fSDumitru Ceclan not: 2573d50d03fSDumitru Ceclan contains: 25888a1ffc6SDumitru Ceclan enum: 25988a1ffc6SDumitru Ceclan - adi,ad7172-4 26088a1ffc6SDumitru Ceclan - adi,ad7173-8 26188a1ffc6SDumitru Ceclan - adi,ad7175-8 2623d50d03fSDumitru Ceclan then: 2633d50d03fSDumitru Ceclan properties: 2643d50d03fSDumitru Ceclan vref2-supply: false 2653d50d03fSDumitru Ceclan patternProperties: 2663d50d03fSDumitru Ceclan "^channel@[0-9a-f]$": 2673d50d03fSDumitru Ceclan properties: 2683d50d03fSDumitru Ceclan adi,reference-select: 2693d50d03fSDumitru Ceclan enum: 2703d50d03fSDumitru Ceclan - vref 2713d50d03fSDumitru Ceclan - refout-avss 2723d50d03fSDumitru Ceclan - avdd 273*561b5d5bSDumitru Ceclan 274*561b5d5bSDumitru Ceclan - if: 275*561b5d5bSDumitru Ceclan properties: 276*561b5d5bSDumitru Ceclan compatible: 277*561b5d5bSDumitru Ceclan contains: 278*561b5d5bSDumitru Ceclan enum: 279*561b5d5bSDumitru Ceclan - adi,ad4114 280*561b5d5bSDumitru Ceclan - adi,ad4115 281*561b5d5bSDumitru Ceclan - adi,ad4116 282*561b5d5bSDumitru Ceclan - adi,ad7173-8 283*561b5d5bSDumitru Ceclan - adi,ad7175-8 284*561b5d5bSDumitru Ceclan then: 285*561b5d5bSDumitru Ceclan patternProperties: 286*561b5d5bSDumitru Ceclan "^channel@[0-9a-f]$": 287*561b5d5bSDumitru Ceclan properties: 288*561b5d5bSDumitru Ceclan reg: 289*561b5d5bSDumitru Ceclan maximum: 15 290*561b5d5bSDumitru Ceclan 291*561b5d5bSDumitru Ceclan - if: 292*561b5d5bSDumitru Ceclan properties: 293*561b5d5bSDumitru Ceclan compatible: 294*561b5d5bSDumitru Ceclan contains: 295*561b5d5bSDumitru Ceclan enum: 296*561b5d5bSDumitru Ceclan - adi,ad7172-2 297*561b5d5bSDumitru Ceclan - adi,ad7175-2 298*561b5d5bSDumitru Ceclan - adi,ad7176-2 299*561b5d5bSDumitru Ceclan - adi,ad7177-2 300*561b5d5bSDumitru Ceclan then: 301*561b5d5bSDumitru Ceclan patternProperties: 302*561b5d5bSDumitru Ceclan "^channel@[0-9a-f]$": 303*561b5d5bSDumitru Ceclan properties: 3043d50d03fSDumitru Ceclan reg: 3053d50d03fSDumitru Ceclan maximum: 3 3063d50d03fSDumitru Ceclan 30788a1ffc6SDumitru Ceclan # Model ad7172-4 does not support internal reference 30888a1ffc6SDumitru Ceclan - if: 30988a1ffc6SDumitru Ceclan properties: 31088a1ffc6SDumitru Ceclan compatible: 31188a1ffc6SDumitru Ceclan contains: 31288a1ffc6SDumitru Ceclan const: adi,ad7172-4 31388a1ffc6SDumitru Ceclan then: 31488a1ffc6SDumitru Ceclan patternProperties: 31588a1ffc6SDumitru Ceclan "^channel@[0-9a-f]$": 31688a1ffc6SDumitru Ceclan properties: 31788a1ffc6SDumitru Ceclan reg: 31888a1ffc6SDumitru Ceclan maximum: 7 31988a1ffc6SDumitru Ceclan adi,reference-select: 32088a1ffc6SDumitru Ceclan enum: 32188a1ffc6SDumitru Ceclan - vref 32288a1ffc6SDumitru Ceclan - vref2 32388a1ffc6SDumitru Ceclan - avdd 32488a1ffc6SDumitru Ceclan required: 32588a1ffc6SDumitru Ceclan - adi,reference-select 32688a1ffc6SDumitru Ceclan 3273d50d03fSDumitru Ceclan - if: 328*561b5d5bSDumitru Ceclan properties: 329*561b5d5bSDumitru Ceclan compatible: 330*561b5d5bSDumitru Ceclan contains: 331*561b5d5bSDumitru Ceclan enum: 332*561b5d5bSDumitru Ceclan - adi,ad4111 333*561b5d5bSDumitru Ceclan - adi,ad4112 334*561b5d5bSDumitru Ceclan - adi,ad4114 335*561b5d5bSDumitru Ceclan - adi,ad4115 336*561b5d5bSDumitru Ceclan - adi,ad4116 337*561b5d5bSDumitru Ceclan then: 338*561b5d5bSDumitru Ceclan properties: 339*561b5d5bSDumitru Ceclan avdd2-supply: false 340*561b5d5bSDumitru Ceclan 341*561b5d5bSDumitru Ceclan - if: 342*561b5d5bSDumitru Ceclan properties: 343*561b5d5bSDumitru Ceclan compatible: 344*561b5d5bSDumitru Ceclan not: 345*561b5d5bSDumitru Ceclan contains: 346*561b5d5bSDumitru Ceclan enum: 347*561b5d5bSDumitru Ceclan - adi,ad4111 348*561b5d5bSDumitru Ceclan - adi,ad4112 349*561b5d5bSDumitru Ceclan then: 350*561b5d5bSDumitru Ceclan patternProperties: 351*561b5d5bSDumitru Ceclan "^channel@[0-9a-f]$": 352*561b5d5bSDumitru Ceclan properties: 353*561b5d5bSDumitru Ceclan adi,current-channel: false 354*561b5d5bSDumitru Ceclan 355*561b5d5bSDumitru Ceclan - if: 3563d50d03fSDumitru Ceclan anyOf: 3573d50d03fSDumitru Ceclan - required: [clock-names] 3583d50d03fSDumitru Ceclan - required: [clocks] 3593d50d03fSDumitru Ceclan then: 3603d50d03fSDumitru Ceclan properties: 3613d50d03fSDumitru Ceclan '#clock-cells': false 3623d50d03fSDumitru Ceclan 3633d50d03fSDumitru CeclanunevaluatedProperties: false 3643d50d03fSDumitru Ceclan 3653d50d03fSDumitru Ceclanexamples: 366*561b5d5bSDumitru Ceclan # Example AD7173-8 with external reference connected to REF+/REF-: 3673d50d03fSDumitru Ceclan - | 3683d50d03fSDumitru Ceclan #include <dt-bindings/gpio/gpio.h> 3693d50d03fSDumitru Ceclan #include <dt-bindings/interrupt-controller/irq.h> 3703d50d03fSDumitru Ceclan 3713d50d03fSDumitru Ceclan spi { 3723d50d03fSDumitru Ceclan #address-cells = <1>; 3733d50d03fSDumitru Ceclan #size-cells = <0>; 3743d50d03fSDumitru Ceclan 3753d50d03fSDumitru Ceclan adc@0 { 3763d50d03fSDumitru Ceclan compatible = "adi,ad7173-8"; 3773d50d03fSDumitru Ceclan reg = <0>; 3783d50d03fSDumitru Ceclan 3793d50d03fSDumitru Ceclan #address-cells = <1>; 3803d50d03fSDumitru Ceclan #size-cells = <0>; 3813d50d03fSDumitru Ceclan 3823d50d03fSDumitru Ceclan interrupts = <25 IRQ_TYPE_EDGE_FALLING>; 3833d50d03fSDumitru Ceclan interrupt-names = "rdy"; 3843d50d03fSDumitru Ceclan interrupt-parent = <&gpio>; 3853d50d03fSDumitru Ceclan spi-max-frequency = <5000000>; 3863d50d03fSDumitru Ceclan gpio-controller; 3873d50d03fSDumitru Ceclan #gpio-cells = <2>; 3883d50d03fSDumitru Ceclan #clock-cells = <0>; 3893d50d03fSDumitru Ceclan 3903d50d03fSDumitru Ceclan vref-supply = <&dummy_regulator>; 3913d50d03fSDumitru Ceclan 3923d50d03fSDumitru Ceclan channel@0 { 3933d50d03fSDumitru Ceclan reg = <0>; 3943d50d03fSDumitru Ceclan bipolar; 3953d50d03fSDumitru Ceclan diff-channels = <0 1>; 3963d50d03fSDumitru Ceclan adi,reference-select = "vref"; 3973d50d03fSDumitru Ceclan }; 3983d50d03fSDumitru Ceclan 3993d50d03fSDumitru Ceclan channel@1 { 4003d50d03fSDumitru Ceclan reg = <1>; 4013d50d03fSDumitru Ceclan diff-channels = <2 3>; 4023d50d03fSDumitru Ceclan }; 4033d50d03fSDumitru Ceclan 4043d50d03fSDumitru Ceclan channel@2 { 4053d50d03fSDumitru Ceclan reg = <2>; 4063d50d03fSDumitru Ceclan bipolar; 4073d50d03fSDumitru Ceclan diff-channels = <4 5>; 4083d50d03fSDumitru Ceclan }; 4093d50d03fSDumitru Ceclan 4103d50d03fSDumitru Ceclan channel@3 { 4113d50d03fSDumitru Ceclan reg = <3>; 4123d50d03fSDumitru Ceclan bipolar; 4133d50d03fSDumitru Ceclan diff-channels = <6 7>; 4143d50d03fSDumitru Ceclan }; 4153d50d03fSDumitru Ceclan 4163d50d03fSDumitru Ceclan channel@4 { 4173d50d03fSDumitru Ceclan reg = <4>; 4183d50d03fSDumitru Ceclan diff-channels = <8 9>; 4193d50d03fSDumitru Ceclan adi,reference-select = "avdd"; 4203d50d03fSDumitru Ceclan }; 4213d50d03fSDumitru Ceclan }; 4223d50d03fSDumitru Ceclan }; 423*561b5d5bSDumitru Ceclan 424*561b5d5bSDumitru Ceclan # Example AD4111 with current channel and single-ended channel: 425*561b5d5bSDumitru Ceclan - | 426*561b5d5bSDumitru Ceclan #include <dt-bindings/gpio/gpio.h> 427*561b5d5bSDumitru Ceclan #include <dt-bindings/interrupt-controller/irq.h> 428*561b5d5bSDumitru Ceclan 429*561b5d5bSDumitru Ceclan spi { 430*561b5d5bSDumitru Ceclan #address-cells = <1>; 431*561b5d5bSDumitru Ceclan #size-cells = <0>; 432*561b5d5bSDumitru Ceclan 433*561b5d5bSDumitru Ceclan adc@0 { 434*561b5d5bSDumitru Ceclan compatible = "adi,ad4111"; 435*561b5d5bSDumitru Ceclan reg = <0>; 436*561b5d5bSDumitru Ceclan 437*561b5d5bSDumitru Ceclan #address-cells = <1>; 438*561b5d5bSDumitru Ceclan #size-cells = <0>; 439*561b5d5bSDumitru Ceclan 440*561b5d5bSDumitru Ceclan interrupts = <25 IRQ_TYPE_EDGE_FALLING>; 441*561b5d5bSDumitru Ceclan interrupt-names = "rdy"; 442*561b5d5bSDumitru Ceclan interrupt-parent = <&gpio>; 443*561b5d5bSDumitru Ceclan spi-max-frequency = <5000000>; 444*561b5d5bSDumitru Ceclan gpio-controller; 445*561b5d5bSDumitru Ceclan #gpio-cells = <2>; 446*561b5d5bSDumitru Ceclan #clock-cells = <0>; 447*561b5d5bSDumitru Ceclan 448*561b5d5bSDumitru Ceclan channel@0 { 449*561b5d5bSDumitru Ceclan reg = <0>; 450*561b5d5bSDumitru Ceclan bipolar; 451*561b5d5bSDumitru Ceclan diff-channels = <4 5>; 452*561b5d5bSDumitru Ceclan }; 453*561b5d5bSDumitru Ceclan 454*561b5d5bSDumitru Ceclan // Single ended channel VIN2/VINCOM 455*561b5d5bSDumitru Ceclan channel@1 { 456*561b5d5bSDumitru Ceclan reg = <1>; 457*561b5d5bSDumitru Ceclan bipolar; 458*561b5d5bSDumitru Ceclan single-channel = <2>; 459*561b5d5bSDumitru Ceclan common-mode-channel = <16>; 460*561b5d5bSDumitru Ceclan }; 461*561b5d5bSDumitru Ceclan 462*561b5d5bSDumitru Ceclan // Current channel IN2+/IN2- 463*561b5d5bSDumitru Ceclan channel@2 { 464*561b5d5bSDumitru Ceclan reg = <2>; 465*561b5d5bSDumitru Ceclan single-channel = <2>; 466*561b5d5bSDumitru Ceclan adi,current-channel; 467*561b5d5bSDumitru Ceclan }; 468*561b5d5bSDumitru Ceclan }; 469*561b5d5bSDumitru Ceclan }; 470