18de148c0SEsteban Blanc# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 28de148c0SEsteban Blanc# Copyright 2024 Analog Devices Inc. 38de148c0SEsteban Blanc# Copyright 2024 BayLibre, SAS. 48de148c0SEsteban Blanc%YAML 1.2 58de148c0SEsteban Blanc--- 68de148c0SEsteban Blanc$id: http://devicetree.org/schemas/iio/adc/adi,ad4030.yaml# 78de148c0SEsteban Blanc$schema: http://devicetree.org/meta-schemas/core.yaml# 88de148c0SEsteban Blanc 98de148c0SEsteban Blanctitle: Analog Devices AD4030 and AD4630 ADC families 108de148c0SEsteban Blanc 118de148c0SEsteban Blancmaintainers: 128de148c0SEsteban Blanc - Michael Hennerich <michael.hennerich@analog.com> 138de148c0SEsteban Blanc - Nuno Sa <nuno.sa@analog.com> 148de148c0SEsteban Blanc 158de148c0SEsteban Blancdescription: | 168de148c0SEsteban Blanc Analog Devices AD4030 single channel and AD4630/AD4632 dual channel precision 178de148c0SEsteban Blanc SAR ADC families 188de148c0SEsteban Blanc 198de148c0SEsteban Blanc * https://www.analog.com/media/en/technical-documentation/data-sheets/ad4030-24-4032-24.pdf 208de148c0SEsteban Blanc * https://www.analog.com/media/en/technical-documentation/data-sheets/ad4630-24_ad4632-24.pdf 218de148c0SEsteban Blanc * https://www.analog.com/media/en/technical-documentation/data-sheets/ad4630-16-4632-16.pdf 22*addb98c4SMarcelo Schmitt * https://www.analog.com/media/en/technical-documentation/data-sheets/adaq4216.pdf 23*addb98c4SMarcelo Schmitt * https://www.analog.com/media/en/technical-documentation/data-sheets/adaq4224.pdf 248de148c0SEsteban Blanc 2534773346SMarcelo Schmitt$ref: /schemas/spi/spi-peripheral-props.yaml# 2634773346SMarcelo Schmitt 278de148c0SEsteban Blancproperties: 288de148c0SEsteban Blanc compatible: 298de148c0SEsteban Blanc enum: 308de148c0SEsteban Blanc - adi,ad4030-24 318de148c0SEsteban Blanc - adi,ad4032-24 328de148c0SEsteban Blanc - adi,ad4630-16 338de148c0SEsteban Blanc - adi,ad4630-24 348de148c0SEsteban Blanc - adi,ad4632-16 358de148c0SEsteban Blanc - adi,ad4632-24 36*addb98c4SMarcelo Schmitt - adi,adaq4216 37*addb98c4SMarcelo Schmitt - adi,adaq4224 388de148c0SEsteban Blanc 398de148c0SEsteban Blanc reg: 408de148c0SEsteban Blanc maxItems: 1 418de148c0SEsteban Blanc 428de148c0SEsteban Blanc spi-max-frequency: 438de148c0SEsteban Blanc maximum: 102040816 448de148c0SEsteban Blanc 458de148c0SEsteban Blanc spi-rx-bus-width: 4637bb4033SDavid Lechner maxItems: 2 4737bb4033SDavid Lechner # all lanes must have the same width 4837bb4033SDavid Lechner oneOf: 4937bb4033SDavid Lechner - contains: 5037bb4033SDavid Lechner const: 1 5137bb4033SDavid Lechner - contains: 5237bb4033SDavid Lechner const: 2 5337bb4033SDavid Lechner - contains: 5437bb4033SDavid Lechner const: 4 558de148c0SEsteban Blanc 568de148c0SEsteban Blanc vdd-5v-supply: true 578de148c0SEsteban Blanc vdd-1v8-supply: true 588de148c0SEsteban Blanc vio-supply: true 598de148c0SEsteban Blanc 608de148c0SEsteban Blanc ref-supply: 618de148c0SEsteban Blanc description: 628de148c0SEsteban Blanc Optional External unbuffered reference. Used when refin-supply is not 638de148c0SEsteban Blanc connected. 648de148c0SEsteban Blanc 658de148c0SEsteban Blanc refin-supply: 668de148c0SEsteban Blanc description: 678de148c0SEsteban Blanc Internal buffered Reference. Used when ref-supply is not connected. 688de148c0SEsteban Blanc 69*addb98c4SMarcelo Schmitt vddh-supply: 70*addb98c4SMarcelo Schmitt description: 71*addb98c4SMarcelo Schmitt PGIA Positive Power Supply. 72*addb98c4SMarcelo Schmitt 73*addb98c4SMarcelo Schmitt vdd-fda-supply: 74*addb98c4SMarcelo Schmitt description: 75*addb98c4SMarcelo Schmitt FDA Positive Power Supply. 76*addb98c4SMarcelo Schmitt 778de148c0SEsteban Blanc cnv-gpios: 788de148c0SEsteban Blanc description: 798de148c0SEsteban Blanc The Convert Input (CNV). It initiates the sampling conversions. 808de148c0SEsteban Blanc maxItems: 1 818de148c0SEsteban Blanc 828de148c0SEsteban Blanc reset-gpios: 838de148c0SEsteban Blanc description: 848de148c0SEsteban Blanc The Reset Input (/RST). Used for asynchronous device reset. 858de148c0SEsteban Blanc maxItems: 1 868de148c0SEsteban Blanc 87*addb98c4SMarcelo Schmitt pga-gpios: 88*addb98c4SMarcelo Schmitt description: 89*addb98c4SMarcelo Schmitt A0 and A1 pins for gain selection. For devices that have PGA configuration 90*addb98c4SMarcelo Schmitt input pins, pga-gpios should be defined. 91*addb98c4SMarcelo Schmitt minItems: 2 92*addb98c4SMarcelo Schmitt maxItems: 2 93*addb98c4SMarcelo Schmitt 945e0d71dcSMarcelo Schmitt pwms: 955e0d71dcSMarcelo Schmitt description: PWM signal connected to the CNV pin. 965e0d71dcSMarcelo Schmitt maxItems: 1 975e0d71dcSMarcelo Schmitt 988de148c0SEsteban Blanc interrupts: 998de148c0SEsteban Blanc description: 1008de148c0SEsteban Blanc The BUSY pin is used to signal that the conversions results are available 1018de148c0SEsteban Blanc to be transferred when in SPI Clocking Mode. This nodes should be 1028de148c0SEsteban Blanc connected to an interrupt that is triggered when the BUSY line goes low. 1038de148c0SEsteban Blanc maxItems: 1 1048de148c0SEsteban Blanc 1058de148c0SEsteban Blanc interrupt-names: 1068de148c0SEsteban Blanc const: busy 1078de148c0SEsteban Blanc 1088de148c0SEsteban Blancrequired: 1098de148c0SEsteban Blanc - compatible 1108de148c0SEsteban Blanc - reg 1118de148c0SEsteban Blanc - vdd-5v-supply 1128de148c0SEsteban Blanc - vdd-1v8-supply 1138de148c0SEsteban Blanc - vio-supply 1148de148c0SEsteban Blanc - cnv-gpios 1158de148c0SEsteban Blanc 1168de148c0SEsteban BlanconeOf: 1178de148c0SEsteban Blanc - required: 1188de148c0SEsteban Blanc - ref-supply 1198de148c0SEsteban Blanc - required: 1208de148c0SEsteban Blanc - refin-supply 1218de148c0SEsteban Blanc 1228de148c0SEsteban BlancunevaluatedProperties: false 1238de148c0SEsteban Blanc 12437bb4033SDavid LechnerallOf: 12537bb4033SDavid Lechner - if: 12637bb4033SDavid Lechner properties: 12737bb4033SDavid Lechner compatible: 12837bb4033SDavid Lechner enum: 12937bb4033SDavid Lechner - adi,ad4030-24 13037bb4033SDavid Lechner - adi,ad4032-24 13137bb4033SDavid Lechner then: 13237bb4033SDavid Lechner properties: 13337bb4033SDavid Lechner spi-rx-bus-width: 13437bb4033SDavid Lechner maxItems: 1 135*addb98c4SMarcelo Schmitt # ADAQ devices require a gain property to indicate how hardware PGA is set 136*addb98c4SMarcelo Schmitt - if: 137*addb98c4SMarcelo Schmitt properties: 138*addb98c4SMarcelo Schmitt compatible: 139*addb98c4SMarcelo Schmitt contains: 140*addb98c4SMarcelo Schmitt pattern: ^adi,adaq 141*addb98c4SMarcelo Schmitt then: 142*addb98c4SMarcelo Schmitt required: 143*addb98c4SMarcelo Schmitt - vddh-supply 144*addb98c4SMarcelo Schmitt - vdd-fda-supply 145*addb98c4SMarcelo Schmitt - pga-gpios 146*addb98c4SMarcelo Schmitt properties: 147*addb98c4SMarcelo Schmitt ref-supply: false 148*addb98c4SMarcelo Schmitt else: 149*addb98c4SMarcelo Schmitt properties: 150*addb98c4SMarcelo Schmitt pga-gpios: false 15137bb4033SDavid Lechner 1528de148c0SEsteban Blancexamples: 1538de148c0SEsteban Blanc - | 1548de148c0SEsteban Blanc #include <dt-bindings/gpio/gpio.h> 1558de148c0SEsteban Blanc 1568de148c0SEsteban Blanc spi { 1578de148c0SEsteban Blanc #address-cells = <1>; 1588de148c0SEsteban Blanc #size-cells = <0>; 1598de148c0SEsteban Blanc 1608de148c0SEsteban Blanc adc@0 { 1618de148c0SEsteban Blanc compatible = "adi,ad4030-24"; 1628de148c0SEsteban Blanc reg = <0>; 1638de148c0SEsteban Blanc spi-max-frequency = <80000000>; 1648de148c0SEsteban Blanc vdd-5v-supply = <&supply_5V>; 1658de148c0SEsteban Blanc vdd-1v8-supply = <&supply_1_8V>; 1668de148c0SEsteban Blanc vio-supply = <&supply_1_8V>; 1678de148c0SEsteban Blanc ref-supply = <&supply_5V>; 1688de148c0SEsteban Blanc cnv-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>; 1698de148c0SEsteban Blanc reset-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>; 1708de148c0SEsteban Blanc }; 1718de148c0SEsteban Blanc }; 17237bb4033SDavid Lechner - | 17337bb4033SDavid Lechner #include <dt-bindings/gpio/gpio.h> 17437bb4033SDavid Lechner 17537bb4033SDavid Lechner spi { 17637bb4033SDavid Lechner #address-cells = <1>; 17737bb4033SDavid Lechner #size-cells = <0>; 17837bb4033SDavid Lechner 17937bb4033SDavid Lechner adc@0 { 18037bb4033SDavid Lechner compatible = "adi,ad4630-24"; 18137bb4033SDavid Lechner reg = <0>; 18237bb4033SDavid Lechner spi-max-frequency = <80000000>; 18337bb4033SDavid Lechner spi-rx-bus-width = <4>, <4>; 18437bb4033SDavid Lechner vdd-5v-supply = <&supply_5V>; 18537bb4033SDavid Lechner vdd-1v8-supply = <&supply_1_8V>; 18637bb4033SDavid Lechner vio-supply = <&supply_1_8V>; 18737bb4033SDavid Lechner ref-supply = <&supply_5V>; 18837bb4033SDavid Lechner cnv-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>; 18937bb4033SDavid Lechner reset-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>; 19037bb4033SDavid Lechner }; 19137bb4033SDavid Lechner }; 192*addb98c4SMarcelo Schmitt - | 193*addb98c4SMarcelo Schmitt #include <dt-bindings/gpio/gpio.h> 194*addb98c4SMarcelo Schmitt 195*addb98c4SMarcelo Schmitt spi { 196*addb98c4SMarcelo Schmitt #address-cells = <1>; 197*addb98c4SMarcelo Schmitt #size-cells = <0>; 198*addb98c4SMarcelo Schmitt 199*addb98c4SMarcelo Schmitt adc@0 { 200*addb98c4SMarcelo Schmitt compatible = "adi,adaq4216"; 201*addb98c4SMarcelo Schmitt reg = <0>; 202*addb98c4SMarcelo Schmitt spi-max-frequency = <80000000>; 203*addb98c4SMarcelo Schmitt vdd-5v-supply = <&supply_5V>; 204*addb98c4SMarcelo Schmitt vdd-1v8-supply = <&supply_1_8V>; 205*addb98c4SMarcelo Schmitt vio-supply = <&supply_1_8V>; 206*addb98c4SMarcelo Schmitt refin-supply = <&refin_sup>; 207*addb98c4SMarcelo Schmitt vddh-supply = <&vddh>; 208*addb98c4SMarcelo Schmitt vdd-fda-supply = <&vdd_fda>; 209*addb98c4SMarcelo Schmitt cnv-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>; 210*addb98c4SMarcelo Schmitt reset-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>; 211*addb98c4SMarcelo Schmitt pga-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>, 212*addb98c4SMarcelo Schmitt <&gpio0 3 GPIO_ACTIVE_HIGH>; 213*addb98c4SMarcelo Schmitt }; 214*addb98c4SMarcelo Schmitt }; 215