1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/iio/adc/adi,ad4000.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Analog Devices AD4000 and similar Analog to Digital Converters 8 9maintainers: 10 - Marcelo Schmitt <marcelo.schmitt@analog.com> 11 12description: | 13 Analog Devices AD4000 family of Analog to Digital Converters with SPI support. 14 Specifications can be found at: 15 https://www.analog.com/media/en/technical-documentation/data-sheets/ad4000-4004-4008.pdf 16 https://www.analog.com/media/en/technical-documentation/data-sheets/ad4001-4005.pdf 17 https://www.analog.com/media/en/technical-documentation/data-sheets/ad4002-4006-4010.pdf 18 https://www.analog.com/media/en/technical-documentation/data-sheets/ad4003-4007-4011.pdf 19 https://www.analog.com/media/en/technical-documentation/data-sheets/ad4020-4021-4022.pdf 20 https://www.analog.com/media/en/technical-documentation/data-sheets/adaq4001.pdf 21 https://www.analog.com/media/en/technical-documentation/data-sheets/adaq4003.pdf 22 23$ref: /schemas/spi/spi-peripheral-props.yaml# 24 25properties: 26 compatible: 27 oneOf: 28 - const: adi,ad4000 29 - items: 30 - enum: 31 - adi,ad4004 32 - adi,ad4008 33 - const: adi,ad4000 34 35 - const: adi,ad4001 36 - items: 37 - enum: 38 - adi,ad4005 39 - const: adi,ad4001 40 41 - const: adi,ad4002 42 - items: 43 - enum: 44 - adi,ad4006 45 - adi,ad4010 46 - const: adi,ad4002 47 48 - const: adi,ad4003 49 - items: 50 - enum: 51 - adi,ad4007 52 - adi,ad4011 53 - const: adi,ad4003 54 55 - const: adi,ad4020 56 - items: 57 - enum: 58 - adi,ad4021 59 - adi,ad4022 60 - const: adi,ad4020 61 62 - const: adi,adaq4001 63 64 - const: adi,adaq4003 65 66 reg: 67 maxItems: 1 68 69 spi-max-frequency: 70 maximum: 102040816 # for VIO > 2.7 V, 81300813 for VIO > 1.7 V 71 72 adi,sdi-pin: 73 $ref: /schemas/types.yaml#/definitions/string 74 enum: [ high, low, cs, sdi ] 75 default: sdi 76 description: 77 Describes how the ADC SDI pin is wired. A value of "sdi" indicates that 78 the ADC SDI is connected to host SDO. "high" indicates that the ADC SDI 79 pin is hard-wired to logic high (VIO). "low" indicates that it is 80 hard-wired low (GND). "cs" indicates that the ADC SDI pin is connected to 81 the host CS line. 82 83 '#daisy-chained-devices': true 84 85 vdd-supply: 86 description: A 1.8V supply that powers the chip (VDD). 87 88 vio-supply: 89 description: 90 A 1.8V to 5.5V supply for the digital inputs and outputs (VIO). 91 92 ref-supply: 93 description: 94 A 2.5 to 5V supply for the external reference voltage (REF). 95 96 cnv-gpios: 97 description: 98 When provided, this property indicates the GPIO that is connected to the 99 CNV pin. 100 maxItems: 1 101 102 adi,high-z-input: 103 type: boolean 104 description: 105 High-Z mode allows the amplifier and RC filter in front of the ADC to be 106 chosen based on the signal bandwidth of interest, rather than the settling 107 requirements of the switched capacitor SAR ADC inputs. 108 109 adi,gain-milli: 110 description: | 111 The hardware gain applied to the ADC input (in milli units). 112 The gain provided by the ADC input scaler is defined by the hardware 113 connections between chip pins OUT+, R1K-, R1K1-, R1K+, R1K1+, and OUT-. 114 If not present, default to 1000 (no actual gain applied). 115 $ref: /schemas/types.yaml#/definitions/uint16 116 enum: [454, 909, 1000, 1900] 117 default: 1000 118 119 interrupts: 120 description: 121 The SDO pin can also function as a busy indicator. This node should be 122 connected to an interrupt that is triggered when the SDO line goes low 123 while the SDI line is high and the CNV line is low ("3-wire" mode) or the 124 SDI line is low and the CNV line is high ("4-wire" mode); or when the SDO 125 line goes high while the SDI and CNV lines are high (chain mode), 126 maxItems: 1 127 128required: 129 - compatible 130 - reg 131 - vdd-supply 132 - vio-supply 133 - ref-supply 134 135allOf: 136 # The configuration register can only be accessed if SDI is connected to MOSI 137 - if: 138 required: 139 - adi,sdi-pin 140 then: 141 properties: 142 adi,high-z-input: false 143 # chain mode has lower SCLK max rate 144 - if: 145 required: 146 - '#daisy-chained-devices' 147 then: 148 properties: 149 spi-max-frequency: 150 maximum: 50000000 # for VIO > 2.7 V, 40000000 for VIO > 1.7 V 151 # Gain property only applies to ADAQ devices 152 - if: 153 properties: 154 compatible: 155 not: 156 contains: 157 enum: 158 - adi,adaq4001 159 - adi,adaq4003 160 then: 161 properties: 162 adi,gain-milli: false 163 164unevaluatedProperties: false 165 166examples: 167 - | 168 #include <dt-bindings/gpio/gpio.h> 169 spi { 170 #address-cells = <1>; 171 #size-cells = <0>; 172 adc@0 { 173 compatible = "adi,ad4020"; 174 reg = <0>; 175 spi-max-frequency = <71000000>; 176 vdd-supply = <&supply_1_8V>; 177 vio-supply = <&supply_1_8V>; 178 ref-supply = <&supply_5V>; 179 adi,sdi-pin = "cs"; 180 cnv-gpios = <&gpio0 88 GPIO_ACTIVE_HIGH>; 181 }; 182 }; 183 - | 184 spi { 185 #address-cells = <1>; 186 #size-cells = <0>; 187 adc@0 { 188 compatible = "adi,adaq4003"; 189 reg = <0>; 190 spi-max-frequency = <80000000>; 191 vdd-supply = <&supply_1_8V>; 192 vio-supply = <&supply_1_8V>; 193 ref-supply = <&supply_5V>; 194 adi,high-z-input; 195 adi,gain-milli = /bits/ 16 <454>; 196 }; 197 }; 198