xref: /linux/Documentation/devicetree/bindings/i3c/renesas,i3c.yaml (revision db4a3f0fbedb0398f77b9047e8b8bb2b49f355bb) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/i3c/renesas,i3c.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Renesas I3C Bus Interface
8
9maintainers:
10  - Wolfram Sang <wsa+renesas@sang-engineering.com>
11  - Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
12
13properties:
14  compatible:
15    oneOf:
16      - items:
17          - enum:
18              - renesas,r9a08g045-i3c # RZ/G3S
19              - renesas,r9a09g047-i3c # RZ/G3E
20      - items:
21          - enum:
22              - renesas,r9a09g056-i3c # RZ/V2N
23              - renesas,r9a09g057-i3c # RZ/V2H(P)
24          - const: renesas,r9a09g047-i3c
25
26  reg:
27    maxItems: 1
28
29  interrupts:
30    items:
31      - description: Non-recoverable internal error interrupt
32      - description: Normal transfer error interrupt
33      - description: Normal transfer abort interrupt
34      - description: Normal response status buffer full interrupt
35      - description: Normal command buffer empty interrupt
36      - description: Normal IBI status buffer full interrupt
37      - description: Normal Rx data buffer full interrupt
38      - description: Normal Tx data buffer empty interrupt
39      - description: Normal receive status buffer full interrupt
40      - description: START condition detection interrupt
41      - description: STOP condition detection interrupt
42      - description: Transmit end interrupt
43      - description: NACK detection interrupt
44      - description: Arbitration lost interrupt
45      - description: Timeout detection interrupt
46      - description: Wake-up condition detection interrupt
47      - description: HDR Exit Pattern detection interrupt
48    minItems: 16
49
50  interrupt-names:
51    items:
52      - const: ierr
53      - const: terr
54      - const: abort
55      - const: resp
56      - const: cmd
57      - const: ibi
58      - const: rx
59      - const: tx
60      - const: rcv
61      - const: st
62      - const: sp
63      - const: tend
64      - const: nack
65      - const: al
66      - const: tmo
67      - const: wu
68      - const: exit
69    minItems: 16
70
71  clocks:
72    items:
73      - description: APB bus clock
74      - description: transfer clock
75      - description: SFRs clock
76    minItems: 2
77
78  clock-names:
79    items:
80      - const: pclk
81      - const: tclk
82      - const: pclkrw
83    minItems: 2
84
85  power-domains:
86    maxItems: 1
87
88  resets:
89    items:
90      - description: Reset signal
91      - description: APB interface reset signal/SCAN reset signal
92
93  reset-names:
94    items:
95      - const: presetn
96      - const: tresetn
97
98required:
99  - compatible
100  - reg
101  - interrupts
102  - interrupt-names
103  - clock-names
104  - clocks
105  - power-domains
106  - resets
107  - reset-names
108
109allOf:
110  - $ref: i3c.yaml#
111
112  - if:
113      properties:
114        compatible:
115          contains:
116            const: renesas,r9a08g045-i3c
117    then:
118      properties:
119        clocks:
120          maxItems: 2
121        clock-names:
122          maxItems: 2
123        interrupts:
124          minItems: 17
125        interrupt-names:
126          minItems: 17
127
128  - if:
129      properties:
130        compatible:
131          contains:
132            const: renesas,r9a09g047-i3c
133    then:
134      properties:
135        clocks:
136          minItems: 3
137        clock-names:
138          minItems: 3
139        interrupts:
140          maxItems: 16
141        interrupt-names:
142          maxItems: 16
143
144unevaluatedProperties: false
145
146examples:
147  - |
148    #include <dt-bindings/clock/r9a08g045-cpg.h>
149    #include <dt-bindings/interrupt-controller/arm-gic.h>
150
151    i3c@1005b000 {
152        compatible = "renesas,r9a08g045-i3c";
153        reg = <0x1005b000 0x1000>;
154        clocks = <&cpg CPG_MOD R9A08G045_I3C_PCLK>,
155                 <&cpg CPG_MOD R9A08G045_I3C_TCLK>;
156        clock-names = "pclk", "tclk";
157        interrupts = <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>,
158                     <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>,
159                     <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>,
160                     <GIC_SPI 294 IRQ_TYPE_EDGE_RISING>,
161                     <GIC_SPI 295 IRQ_TYPE_EDGE_RISING>,
162                     <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>,
163                     <GIC_SPI 297 IRQ_TYPE_EDGE_RISING>,
164                     <GIC_SPI 298 IRQ_TYPE_EDGE_RISING>,
165                     <GIC_SPI 299 IRQ_TYPE_EDGE_RISING>,
166                     <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
167                     <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
168                     <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
169                     <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
170                     <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
171                     <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
172                     <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
173                     <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
174        interrupt-names = "ierr", "terr", "abort", "resp",
175                          "cmd", "ibi", "rx", "tx", "rcv",
176                          "st", "sp", "tend", "nack",
177                          "al", "tmo", "wu", "exit";
178        resets = <&cpg R9A08G045_I3C_PRESETN>,
179                 <&cpg R9A08G045_I3C_TRESETN>;
180        reset-names = "presetn", "tresetn";
181        power-domains = <&cpg>;
182        #address-cells = <3>;
183        #size-cells = <0>;
184    };
185...
186