xref: /linux/Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml (revision 4b132aacb0768ac1e652cf517097ea6f237214b9) 
1# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/i2c/snps,designware-i2c.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Synopsys DesignWare APB I2C Controller
8
9maintainers:
10  - Jarkko Nikula <jarkko.nikula@linux.intel.com>
11
12allOf:
13  - $ref: /schemas/i2c/i2c-controller.yaml#
14  - if:
15      properties:
16        compatible:
17          not:
18            contains:
19              const: mscc,ocelot-i2c
20    then:
21      properties:
22        reg:
23          maxItems: 1
24
25properties:
26  compatible:
27    oneOf:
28      - description: Generic Synopsys DesignWare I2C controller
29        const: snps,designware-i2c
30      - description: Microsemi Ocelot SoCs I2C controller
31        items:
32          - const: mscc,ocelot-i2c
33          - const: snps,designware-i2c
34      - description: Baikal-T1 SoC System I2C controller
35        const: baikal,bt1-sys-i2c
36      - description: T-HEAD TH1520 SoCs I2C controller
37        items:
38          - const: thead,th1520-i2c
39          - const: snps,designware-i2c
40
41  reg:
42    minItems: 1
43    items:
44      - description: DW APB I2C controller memory mapped registers
45      - description: |
46          ICPU_CFG:TWI_DELAY registers to setup the SDA hold time.
47          This registers are specific to the Ocelot I2C-controller.
48
49  interrupts:
50    maxItems: 1
51
52  clocks:
53    minItems: 1
54    items:
55      - description: I2C controller reference clock source
56      - description: APB interface clock source
57
58  clock-names:
59    minItems: 1
60    items:
61      - const: ref
62      - const: pclk
63
64  resets:
65    maxItems: 1
66
67  clock-frequency:
68    description: Desired I2C bus clock frequency in Hz
69    enum: [100000, 400000, 1000000, 3400000]
70    default: 400000
71
72  i2c-sda-hold-time-ns:
73    description: |
74      The property should contain the SDA hold time in nanoseconds. This option
75      is only supported in hardware blocks version 1.11a or newer or on
76      Microsemi SoCs.
77
78  i2c-scl-falling-time-ns:
79    description: |
80      The property should contain the SCL falling time in nanoseconds.
81      This value is used to compute the tLOW period.
82    default: 300
83
84  i2c-sda-falling-time-ns:
85    description: |
86      The property should contain the SDA falling time in nanoseconds.
87      This value is used to compute the tHIGH period.
88    default: 300
89
90  dmas:
91    items:
92      - description: TX DMA Channel
93      - description: RX DMA Channel
94
95  dma-names:
96    items:
97      - const: tx
98      - const: rx
99
100unevaluatedProperties: false
101
102required:
103  - compatible
104  - reg
105  - interrupts
106
107examples:
108  - |
109    i2c@f0000 {
110      compatible = "snps,designware-i2c";
111      reg = <0xf0000 0x1000>;
112      interrupts = <11>;
113      clock-frequency = <400000>;
114    };
115  - |
116    i2c@1120000 {
117      compatible = "snps,designware-i2c";
118      reg = <0x1120000 0x1000>;
119      interrupts = <12 1>;
120      clock-frequency = <400000>;
121      i2c-sda-hold-time-ns = <300>;
122      i2c-sda-falling-time-ns = <300>;
123      i2c-scl-falling-time-ns = <300>;
124    };
125  - |
126    i2c@2000 {
127      compatible = "snps,designware-i2c";
128      reg = <0x2000 0x100>;
129      #address-cells = <1>;
130      #size-cells = <0>;
131      clock-frequency = <400000>;
132      clocks = <&i2cclk>;
133      interrupts = <0>;
134
135      eeprom@64 {
136        compatible = "atmel,24c02";
137        reg = <0x64>;
138      };
139    };
140  - |
141    i2c@100400 {
142      compatible = "mscc,ocelot-i2c", "snps,designware-i2c";
143      reg = <0x100400 0x100>, <0x198 0x8>;
144      pinctrl-0 = <&i2c_pins>;
145      pinctrl-names = "default";
146      interrupts = <8>;
147      clocks = <&ahb_clk>;
148    };
149...
150