xref: /linux/Documentation/devicetree/bindings/i2c/silabs,cp2112.yaml (revision 99e447220b938dfed6488db95a2930b57ea849ba)
1*079a015bSDanny Kaehn# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*079a015bSDanny Kaehn%YAML 1.2
3*079a015bSDanny Kaehn---
4*079a015bSDanny Kaehn$id: http://devicetree.org/schemas/i2c/silabs,cp2112.yaml#
5*079a015bSDanny Kaehn$schema: http://devicetree.org/meta-schemas/core.yaml#
6*079a015bSDanny Kaehn
7*079a015bSDanny Kaehntitle: CP2112 HID USB to SMBus/I2C Bridge
8*079a015bSDanny Kaehn
9*079a015bSDanny Kaehnmaintainers:
10*079a015bSDanny Kaehn  - Danny Kaehn <danny.kaehn@plexus.com>
11*079a015bSDanny Kaehn
12*079a015bSDanny Kaehndescription:
13*079a015bSDanny Kaehn  The CP2112 is a USB HID device which includes an integrated I2C controller
14*079a015bSDanny Kaehn  and 8 GPIO pins. Its GPIO pins can each be configured as inputs, open-drain
15*079a015bSDanny Kaehn  outputs, or push-pull outputs.
16*079a015bSDanny Kaehn
17*079a015bSDanny Kaehnproperties:
18*079a015bSDanny Kaehn  compatible:
19*079a015bSDanny Kaehn    const: usb10c4,ea90
20*079a015bSDanny Kaehn
21*079a015bSDanny Kaehn  reg:
22*079a015bSDanny Kaehn    maxItems: 1
23*079a015bSDanny Kaehn    description: The USB port number
24*079a015bSDanny Kaehn
25*079a015bSDanny Kaehn  interrupt-controller: true
26*079a015bSDanny Kaehn  "#interrupt-cells":
27*079a015bSDanny Kaehn    const: 2
28*079a015bSDanny Kaehn
29*079a015bSDanny Kaehn  gpio-controller: true
30*079a015bSDanny Kaehn  "#gpio-cells":
31*079a015bSDanny Kaehn    const: 2
32*079a015bSDanny Kaehn
33*079a015bSDanny Kaehn  gpio-line-names:
34*079a015bSDanny Kaehn    minItems: 1
35*079a015bSDanny Kaehn    maxItems: 8
36*079a015bSDanny Kaehn
37*079a015bSDanny Kaehn  i2c:
38*079a015bSDanny Kaehn    description: The SMBus/I2C controller node for the CP2112
39*079a015bSDanny Kaehn    $ref: /schemas/i2c/i2c-controller.yaml#
40*079a015bSDanny Kaehn    unevaluatedProperties: false
41*079a015bSDanny Kaehn
42*079a015bSDanny Kaehn    properties:
43*079a015bSDanny Kaehn      clock-frequency:
44*079a015bSDanny Kaehn        minimum: 10000
45*079a015bSDanny Kaehn        default: 100000
46*079a015bSDanny Kaehn        maximum: 400000
47*079a015bSDanny Kaehn
48*079a015bSDanny KaehnpatternProperties:
49*079a015bSDanny Kaehn  "-hog(-[0-9]+)?$":
50*079a015bSDanny Kaehn    type: object
51*079a015bSDanny Kaehn
52*079a015bSDanny Kaehn    required:
53*079a015bSDanny Kaehn      - gpio-hog
54*079a015bSDanny Kaehn
55*079a015bSDanny Kaehnrequired:
56*079a015bSDanny Kaehn  - compatible
57*079a015bSDanny Kaehn  - reg
58*079a015bSDanny Kaehn
59*079a015bSDanny KaehnadditionalProperties: false
60*079a015bSDanny Kaehn
61*079a015bSDanny Kaehnexamples:
62*079a015bSDanny Kaehn  - |
63*079a015bSDanny Kaehn    #include <dt-bindings/interrupt-controller/irq.h>
64*079a015bSDanny Kaehn    #include <dt-bindings/gpio/gpio.h>
65*079a015bSDanny Kaehn
66*079a015bSDanny Kaehn    usb {
67*079a015bSDanny Kaehn        #address-cells = <1>;
68*079a015bSDanny Kaehn        #size-cells = <0>;
69*079a015bSDanny Kaehn
70*079a015bSDanny Kaehn        cp2112: device@1 {
71*079a015bSDanny Kaehn            compatible = "usb10c4,ea90";
72*079a015bSDanny Kaehn            reg = <1>;
73*079a015bSDanny Kaehn
74*079a015bSDanny Kaehn            gpio-controller;
75*079a015bSDanny Kaehn            interrupt-controller;
76*079a015bSDanny Kaehn            #interrupt-cells = <2>;
77*079a015bSDanny Kaehn            #gpio-cells = <2>;
78*079a015bSDanny Kaehn            gpio-line-names = "CP2112_SDA", "CP2112_SCL", "TEST2",
79*079a015bSDanny Kaehn                              "TEST3","TEST4", "TEST5", "TEST6";
80*079a015bSDanny Kaehn
81*079a015bSDanny Kaehn            fan-rst-hog {
82*079a015bSDanny Kaehn                gpio-hog;
83*079a015bSDanny Kaehn                gpios = <7 GPIO_ACTIVE_HIGH>;
84*079a015bSDanny Kaehn                output-high;
85*079a015bSDanny Kaehn                line-name = "FAN_RST";
86*079a015bSDanny Kaehn            };
87*079a015bSDanny Kaehn
88*079a015bSDanny Kaehn            i2c {
89*079a015bSDanny Kaehn                #address-cells = <1>;
90*079a015bSDanny Kaehn                #size-cells = <0>;
91*079a015bSDanny Kaehn                sda-gpios = <&cp2112 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
92*079a015bSDanny Kaehn                scl-gpios = <&cp2112 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
93*079a015bSDanny Kaehn
94*079a015bSDanny Kaehn                temp@48 {
95*079a015bSDanny Kaehn                    compatible = "national,lm75";
96*079a015bSDanny Kaehn                    reg = <0x48>;
97*079a015bSDanny Kaehn                };
98*079a015bSDanny Kaehn            };
99*079a015bSDanny Kaehn        };
100*079a015bSDanny Kaehn    };
101