1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/i2c/samsung,s3c2410-i2c.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Samsung S3C/S5P/Exynos SoC I2C Controller 8 9maintainers: 10 - Krzysztof Kozlowski <krzk@kernel.org> 11 12properties: 13 compatible: 14 oneOf: 15 - enum: 16 - samsung,s3c2410-i2c 17 - samsung,s3c2440-i2c 18 # For s3c2440-like I2C used inside HDMIPHY block found on several SoCs: 19 - samsung,s3c2440-hdmiphy-i2c 20 # For s3c2440-like I2C used as a host to SATA PHY controller on an 21 # internal bus: 22 - samsung,exynos5-sata-phy-i2c 23 - items: 24 - enum: 25 - samsung,exynos7885-i2c 26 - samsung,exynos850-i2c 27 - const: samsung,s3c2440-i2c 28 29 clocks: 30 maxItems: 1 31 32 clock-names: 33 items: 34 - const: i2c 35 36 gpios: 37 description: | 38 The order of the GPIOs should be the following:: <SDA, SCL>. The GPIO 39 specifier depends on the gpio controller. Required in all cases except 40 for "samsung,s3c2440-hdmiphy-i2c" whose input/output lines are 41 permanently wired to the respective client. 42 This property is deprecated. Use "pinctrl-0" and "pinctrl-names" instead. 43 deprecated: true 44 45 interrupts: 46 maxItems: 1 47 48 reg: 49 maxItems: 1 50 51 samsung,i2c-max-bus-freq: 52 $ref: /schemas/types.yaml#/definitions/uint32 53 description: 54 Desired frequency in Hz of the bus. 55 default: 100000 56 57 samsung,i2c-sda-delay: 58 $ref: /schemas/types.yaml#/definitions/uint32 59 description: 60 Delay (in ns) applied to data line (SDA) edges. 61 default: 0 62 63 samsung,i2c-slave-addr: 64 $ref: /schemas/types.yaml#/definitions/uint32 65 description: 66 Slave address in multi-master environment. 67 default: 0 68 69 samsung,sysreg-phandle: 70 $ref: /schemas/types.yaml#/definitions/phandle 71 description: Pandle to syscon used to control the system registers. 72 73required: 74 - compatible 75 - reg 76 77allOf: 78 - $ref: /schemas/i2c/i2c-controller.yaml# 79 - if: 80 properties: 81 compatible: 82 contains: 83 enum: 84 - samsung,s3c2440-hdmiphy-i2c 85 - samsung,exynos5-sata-phy-i2c 86 then: 87 properties: 88 gpios: false 89 90 - if: 91 properties: 92 compatible: 93 contains: 94 enum: 95 - samsung,s3c2410-i2c 96 - samsung,s3c2440-i2c 97 - samsung,s3c2440-hdmiphy-i2c 98 then: 99 required: 100 - interrupts 101 102unevaluatedProperties: false 103 104examples: 105 - | 106 #include <dt-bindings/clock/exynos5250.h> 107 #include <dt-bindings/interrupt-controller/arm-gic.h> 108 109 i2c@12c60000 { 110 compatible = "samsung,s3c2440-i2c"; 111 reg = <0x12C60000 0x100>; 112 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; 113 #address-cells = <1>; 114 #size-cells = <0>; 115 clocks = <&clock CLK_I2C0>; 116 clock-names = "i2c"; 117 pinctrl-names = "default"; 118 pinctrl-0 = <&i2c0_bus>; 119 120 samsung,sysreg-phandle = <&sysreg_system_controller>; 121 samsung,i2c-sda-delay = <100>; 122 samsung,i2c-max-bus-freq = <20000>; 123 samsung,i2c-slave-addr = <0x66>; 124 125 eeprom@50 { 126 compatible = "samsung,s524ad0xd1", "atmel,24c128"; 127 reg = <0x50>; 128 }; 129 }; 130 131 i2c@12ce0000 { 132 compatible = "samsung,s3c2440-hdmiphy-i2c"; 133 reg = <0x12CE0000 0x1000>; 134 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; 135 #address-cells = <1>; 136 #size-cells = <0>; 137 clocks = <&clock CLK_I2C_HDMI>; 138 clock-names = "i2c"; 139 140 samsung,i2c-sda-delay = <100>; 141 samsung,i2c-max-bus-freq = <66000>; 142 143 phy-i2c@38 { 144 compatible = "samsung,exynos4212-hdmiphy"; 145 reg = <0x38>; 146 }; 147 }; 148 149 i2c@121d0000 { 150 compatible = "samsung,exynos5-sata-phy-i2c"; 151 reg = <0x121D0000 0x100>; 152 #address-cells = <1>; 153 #size-cells = <0>; 154 clocks = <&clock CLK_SATA_PHYI2C>; 155 clock-names = "i2c"; 156 157 samsung,i2c-sda-delay = <100>; 158 samsung,i2c-max-bus-freq = <40000>; 159 160 phy-i2c@38 { 161 compatible = "samsung,exynos-sataphy-i2c"; 162 reg = <0x38>; 163 }; 164 }; 165