xref: /linux/Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml (revision b92dd11725a7c57f55e148c7d3ce58a86f480575) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/i2c/renesas,rzv2m.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Renesas RZ/V2M I2C Bus Interface
8
9maintainers:
10  - Phil Edworthy <phil.edworthy@renesas.com>
11
12allOf:
13  - $ref: /schemas/i2c/i2c-controller.yaml#
14
15properties:
16  compatible:
17    items:
18      - enum:
19          - renesas,i2c-r9a09g011  # RZ/V2M
20      - const: renesas,rzv2m-i2c
21
22  reg:
23    maxItems: 1
24
25  interrupts:
26    items:
27      - description: Data transmission/reception interrupt
28      - description: Status interrupt
29
30  interrupt-names:
31    items:
32      - const: tia
33      - const: tis
34
35  clock-frequency:
36    default: 100000
37    enum: [ 100000, 400000 ]
38    description:
39      Desired I2C bus clock frequency in Hz.
40
41  clocks:
42    maxItems: 1
43
44  power-domains:
45    maxItems: 1
46
47  resets:
48    maxItems: 1
49
50required:
51  - compatible
52  - reg
53  - interrupts
54  - interrupt-names
55  - clocks
56  - power-domains
57  - resets
58  - '#address-cells'
59  - '#size-cells'
60
61unevaluatedProperties: false
62
63examples:
64  - |
65    #include <dt-bindings/clock/r9a09g011-cpg.h>
66    #include <dt-bindings/interrupt-controller/arm-gic.h>
67
68    i2c0: i2c@a4030000 {
69        compatible = "renesas,i2c-r9a09g011", "renesas,rzv2m-i2c";
70        reg = <0xa4030000 0x80>;
71        interrupts = <GIC_SPI 232 IRQ_TYPE_EDGE_RISING>,
72                     <GIC_SPI 236 IRQ_TYPE_EDGE_RISING>;
73        interrupt-names = "tia", "tis";
74        clocks = <&cpg CPG_MOD R9A09G011_IIC_PCLK0>;
75        resets = <&cpg R9A09G011_IIC_GPA_PRESETN>;
76        power-domains = <&cpg>;
77        clock-frequency = <100000>;
78        #address-cells = <1>;
79        #size-cells = <0>;
80    };
81