1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/i2c/renesas,riic.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Renesas RZ/A and RZ/G2L I2C Bus Interface (RIIC) 8 9maintainers: 10 - Chris Brandt <chris.brandt@renesas.com> 11 - Wolfram Sang <wsa+renesas@sang-engineering.com> 12 13properties: 14 compatible: 15 oneOf: 16 - items: 17 - enum: 18 - renesas,riic-r7s72100 # RZ/A1H 19 - renesas,riic-r7s9210 # RZ/A2M 20 - renesas,riic-r9a07g043 # RZ/G2UL and RZ/Five 21 - renesas,riic-r9a07g044 # RZ/G2{L,LC} 22 - renesas,riic-r9a07g054 # RZ/V2L 23 - const: renesas,riic-rz # RZ/A or RZ/G2L 24 25 - items: 26 - enum: 27 - renesas,riic-r9a08g045 # RZ/G3S 28 - renesas,riic-r9a09g047 # RZ/G3E 29 - renesas,riic-r9a09g056 # RZ/V2N 30 - const: renesas,riic-r9a09g057 # RZ/V2H(P) 31 32 - enum: 33 - renesas,riic-r9a09g057 # RZ/V2H(P) 34 - renesas,riic-r9a09g077 # RZ/T2H 35 36 - items: 37 - const: renesas,riic-r9a09g087 # RZ/N2H 38 - const: renesas,riic-r9a09g077 # RZ/T2H 39 40 reg: 41 maxItems: 1 42 43 interrupts: 44 oneOf: 45 - items: 46 - description: Transmit End Interrupt 47 - description: Receive Data Full Interrupt 48 - description: Transmit Data Empty Interrupt 49 - description: Stop Condition Detection Interrupt 50 - description: Start Condition Detection Interrupt 51 - description: NACK Reception Interrupt 52 - description: Arbitration-Lost Interrupt 53 - description: Timeout Interrupt 54 - items: 55 - description: Transfer Error Or Event Generation 56 - description: Receive Data Full Interrupt 57 - description: Transmit Data Empty Interrupt 58 - description: Transmit End Interrupt 59 60 interrupt-names: 61 oneOf: 62 - items: 63 - const: tei 64 - const: ri 65 - const: ti 66 - const: spi 67 - const: sti 68 - const: naki 69 - const: ali 70 - const: tmoi 71 - items: 72 - const: eei 73 - const: rxi 74 - const: txi 75 - const: tei 76 77 clock-frequency: 78 description: 79 Desired I2C bus clock frequency in Hz. The absence of this property 80 indicates the default frequency 100 kHz. 81 82 clocks: 83 maxItems: 1 84 85 power-domains: 86 maxItems: 1 87 88 resets: 89 maxItems: 1 90 91required: 92 - compatible 93 - reg 94 - interrupts 95 - interrupt-names 96 - clocks 97 - clock-frequency 98 - power-domains 99 - '#address-cells' 100 - '#size-cells' 101 102allOf: 103 - $ref: /schemas/i2c/i2c-controller.yaml# 104 105 - if: 106 properties: 107 compatible: 108 contains: 109 const: renesas,riic-r9a09g077 110 then: 111 properties: 112 interrupts: 113 maxItems: 4 114 interrupt-names: 115 maxItems: 4 116 resets: false 117 else: 118 properties: 119 interrupts: 120 minItems: 8 121 interrupt-names: 122 minItems: 8 123 124 - if: 125 properties: 126 compatible: 127 contains: 128 enum: 129 - renesas,riic-r9a07g043 130 - renesas,riic-r9a07g044 131 - renesas,riic-r9a07g054 132 - renesas,riic-r9a09g057 133 then: 134 required: 135 - resets 136 137unevaluatedProperties: false 138 139examples: 140 - | 141 #include <dt-bindings/clock/r7s72100-clock.h> 142 #include <dt-bindings/interrupt-controller/arm-gic.h> 143 144 i2c0: i2c@fcfee000 { 145 compatible = "renesas,riic-r7s72100", "renesas,riic-rz"; 146 reg = <0xfcfee000 0x44>; 147 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>, 148 <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>, 149 <GIC_SPI 159 IRQ_TYPE_EDGE_RISING>, 150 <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>, 151 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>, 152 <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>, 153 <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>, 154 <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 155 interrupt-names = "tei", "ri", "ti", "spi", "sti", "naki", "ali", 156 "tmoi"; 157 clocks = <&mstp9_clks R7S72100_CLK_I2C0>; 158 clock-frequency = <100000>; 159 power-domains = <&cpg_clocks>; 160 #address-cells = <1>; 161 #size-cells = <0>; 162 }; 163