xref: /linux/Documentation/devicetree/bindings/i2c/renesas,riic.yaml (revision d9a0788093565c300f7c8dd034dbfa6ac4da9aa6) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/i2c/renesas,riic.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Renesas RZ/A and RZ/G2L I2C Bus Interface (RIIC)
8
9maintainers:
10  - Chris Brandt <chris.brandt@renesas.com>
11  - Wolfram Sang <wsa+renesas@sang-engineering.com>
12
13allOf:
14  - $ref: /schemas/i2c/i2c-controller.yaml#
15
16properties:
17  compatible:
18    oneOf:
19      - items:
20          - enum:
21              - renesas,riic-r7s72100   # RZ/A1H
22              - renesas,riic-r7s9210    # RZ/A2M
23              - renesas,riic-r9a07g043  # RZ/G2UL and RZ/Five
24              - renesas,riic-r9a07g044  # RZ/G2{L,LC}
25              - renesas,riic-r9a07g054  # RZ/V2L
26          - const: renesas,riic-rz      # RZ/A or RZ/G2L
27
28      - items:
29          - enum:
30              - renesas,riic-r9a08g045   # RZ/G3S
31              - renesas,riic-r9a09g047   # RZ/G3E
32              - renesas,riic-r9a09g056   # RZ/V2N
33          - const: renesas,riic-r9a09g057   # RZ/V2H(P)
34
35      - const: renesas,riic-r9a09g057   # RZ/V2H(P)
36
37  reg:
38    maxItems: 1
39
40  interrupts:
41    items:
42      - description: Transmit End Interrupt
43      - description: Receive Data Full Interrupt
44      - description: Transmit Data Empty Interrupt
45      - description: Stop Condition Detection Interrupt
46      - description: Start Condition Detection Interrupt
47      - description: NACK Reception Interrupt
48      - description: Arbitration-Lost Interrupt
49      - description: Timeout Interrupt
50
51  interrupt-names:
52    items:
53      - const: tei
54      - const: ri
55      - const: ti
56      - const: spi
57      - const: sti
58      - const: naki
59      - const: ali
60      - const: tmoi
61
62  clock-frequency:
63    description:
64      Desired I2C bus clock frequency in Hz. The absence of this property
65      indicates the default frequency 100 kHz.
66
67  clocks:
68    maxItems: 1
69
70  power-domains:
71    maxItems: 1
72
73  resets:
74    maxItems: 1
75
76required:
77  - compatible
78  - reg
79  - interrupts
80  - interrupt-names
81  - clocks
82  - clock-frequency
83  - power-domains
84  - '#address-cells'
85  - '#size-cells'
86
87if:
88  properties:
89    compatible:
90      contains:
91        enum:
92          - renesas,riic-r9a07g043
93          - renesas,riic-r9a07g044
94          - renesas,riic-r9a07g054
95          - renesas,riic-r9a09g057
96then:
97  required:
98    - resets
99
100unevaluatedProperties: false
101
102examples:
103  - |
104    #include <dt-bindings/clock/r7s72100-clock.h>
105    #include <dt-bindings/interrupt-controller/arm-gic.h>
106
107    i2c0: i2c@fcfee000 {
108        compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
109        reg = <0xfcfee000 0x44>;
110        interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
111                     <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>,
112                     <GIC_SPI 159 IRQ_TYPE_EDGE_RISING>,
113                     <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
114                     <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
115                     <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
116                     <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
117                     <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
118        interrupt-names = "tei", "ri", "ti", "spi", "sti", "naki", "ali",
119                          "tmoi";
120        clocks = <&mstp9_clks R7S72100_CLK_I2C0>;
121        clock-frequency = <100000>;
122        power-domains = <&cpg_clocks>;
123        #address-cells = <1>;
124        #size-cells = <0>;
125    };
126