1ba7a4d15SPhil Edworthy# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2ba7a4d15SPhil Edworthy%YAML 1.2 3ba7a4d15SPhil Edworthy--- 4ba7a4d15SPhil Edworthy$id: http://devicetree.org/schemas/i2c/renesas,rzv2m.yaml# 5ba7a4d15SPhil Edworthy$schema: http://devicetree.org/meta-schemas/core.yaml# 6ba7a4d15SPhil Edworthy 7ba7a4d15SPhil Edworthytitle: Renesas RZ/V2M I2C Bus Interface 8ba7a4d15SPhil Edworthy 9ba7a4d15SPhil Edworthymaintainers: 10*f30ec5dfSChris Paterson - Fabrizio Castro <fabrizio.castro.jz@renesas.com> 11ba7a4d15SPhil Edworthy 12ba7a4d15SPhil EdworthyallOf: 13ba7a4d15SPhil Edworthy - $ref: /schemas/i2c/i2c-controller.yaml# 14ba7a4d15SPhil Edworthy 15ba7a4d15SPhil Edworthyproperties: 16ba7a4d15SPhil Edworthy compatible: 17ba7a4d15SPhil Edworthy items: 18ba7a4d15SPhil Edworthy - enum: 190a4eecf9SFabrizio Castro - renesas,r9a09g011-i2c # RZ/V2M 20ba7a4d15SPhil Edworthy - const: renesas,rzv2m-i2c 21ba7a4d15SPhil Edworthy 22ba7a4d15SPhil Edworthy reg: 23ba7a4d15SPhil Edworthy maxItems: 1 24ba7a4d15SPhil Edworthy 25ba7a4d15SPhil Edworthy interrupts: 26ba7a4d15SPhil Edworthy items: 27ba7a4d15SPhil Edworthy - description: Data transmission/reception interrupt 28ba7a4d15SPhil Edworthy - description: Status interrupt 29ba7a4d15SPhil Edworthy 30ba7a4d15SPhil Edworthy interrupt-names: 31ba7a4d15SPhil Edworthy items: 32ba7a4d15SPhil Edworthy - const: tia 33ba7a4d15SPhil Edworthy - const: tis 34ba7a4d15SPhil Edworthy 35ba7a4d15SPhil Edworthy clock-frequency: 36ba7a4d15SPhil Edworthy default: 100000 37ba7a4d15SPhil Edworthy enum: [ 100000, 400000 ] 38ba7a4d15SPhil Edworthy description: 39ba7a4d15SPhil Edworthy Desired I2C bus clock frequency in Hz. 40ba7a4d15SPhil Edworthy 41ba7a4d15SPhil Edworthy clocks: 42ba7a4d15SPhil Edworthy maxItems: 1 43ba7a4d15SPhil Edworthy 44ba7a4d15SPhil Edworthy power-domains: 45ba7a4d15SPhil Edworthy maxItems: 1 46ba7a4d15SPhil Edworthy 47ba7a4d15SPhil Edworthy resets: 48ba7a4d15SPhil Edworthy maxItems: 1 49ba7a4d15SPhil Edworthy 50ba7a4d15SPhil Edworthyrequired: 51ba7a4d15SPhil Edworthy - compatible 52ba7a4d15SPhil Edworthy - reg 53ba7a4d15SPhil Edworthy - interrupts 54ba7a4d15SPhil Edworthy - interrupt-names 55ba7a4d15SPhil Edworthy - clocks 56ba7a4d15SPhil Edworthy - power-domains 57ba7a4d15SPhil Edworthy - resets 58ba7a4d15SPhil Edworthy - '#address-cells' 59ba7a4d15SPhil Edworthy - '#size-cells' 60ba7a4d15SPhil Edworthy 61ba7a4d15SPhil EdworthyunevaluatedProperties: false 62ba7a4d15SPhil Edworthy 63ba7a4d15SPhil Edworthyexamples: 64ba7a4d15SPhil Edworthy - | 65ba7a4d15SPhil Edworthy #include <dt-bindings/clock/r9a09g011-cpg.h> 66ba7a4d15SPhil Edworthy #include <dt-bindings/interrupt-controller/arm-gic.h> 67ba7a4d15SPhil Edworthy 68ba7a4d15SPhil Edworthy i2c0: i2c@a4030000 { 690a4eecf9SFabrizio Castro compatible = "renesas,r9a09g011-i2c", "renesas,rzv2m-i2c"; 70ba7a4d15SPhil Edworthy reg = <0xa4030000 0x80>; 71ba7a4d15SPhil Edworthy interrupts = <GIC_SPI 232 IRQ_TYPE_EDGE_RISING>, 72ba7a4d15SPhil Edworthy <GIC_SPI 236 IRQ_TYPE_EDGE_RISING>; 73ba7a4d15SPhil Edworthy interrupt-names = "tia", "tis"; 74ba7a4d15SPhil Edworthy clocks = <&cpg CPG_MOD R9A09G011_IIC_PCLK0>; 75ba7a4d15SPhil Edworthy resets = <&cpg R9A09G011_IIC_GPA_PRESETN>; 76ba7a4d15SPhil Edworthy power-domains = <&cpg>; 77ba7a4d15SPhil Edworthy clock-frequency = <100000>; 78ba7a4d15SPhil Edworthy #address-cells = <1>; 79ba7a4d15SPhil Edworthy #size-cells = <0>; 80ba7a4d15SPhil Edworthy }; 81