xref: /linux/Documentation/devicetree/bindings/i2c/renesas,riic.yaml (revision c16c8bfa09d5f318c1bd65698d058d3739970c24) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/i2c/renesas,riic.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Renesas RZ/A and RZ/G2L I2C Bus Interface (RIIC)
8
9maintainers:
10  - Chris Brandt <chris.brandt@renesas.com>
11  - Wolfram Sang <wsa+renesas@sang-engineering.com>
12
13allOf:
14  - $ref: /schemas/i2c/i2c-controller.yaml#
15
16properties:
17  compatible:
18    items:
19      - enum:
20          - renesas,riic-r7s72100   # RZ/A1H
21          - renesas,riic-r7s9210    # RZ/A2M
22          - renesas,riic-r9a07g044  # RZ/G2{L,LC}
23          - renesas,riic-r9a07g054  # RZ/V2L
24      - const: renesas,riic-rz      # RZ/A or RZ/G2L
25
26  reg:
27    maxItems: 1
28
29  interrupts:
30    items:
31      - description: Transmit End Interrupt
32      - description: Receive Data Full Interrupt
33      - description: Transmit Data Empty Interrupt
34      - description: Stop Condition Detection Interrupt
35      - description: Start Condition Detection Interrupt
36      - description: NACK Reception Interrupt
37      - description: Arbitration-Lost Interrupt
38      - description: Timeout Interrupt
39
40  interrupt-names:
41    items:
42      - const: tei
43      - const: ri
44      - const: ti
45      - const: spi
46      - const: sti
47      - const: naki
48      - const: ali
49      - const: tmoi
50
51  clock-frequency:
52    description:
53      Desired I2C bus clock frequency in Hz. The absence of this property
54      indicates the default frequency 100 kHz.
55
56  clocks:
57    maxItems: 1
58
59  power-domains:
60    maxItems: 1
61
62required:
63  - compatible
64  - reg
65  - interrupts
66  - interrupt-names
67  - clocks
68  - clock-frequency
69  - power-domains
70  - '#address-cells'
71  - '#size-cells'
72
73if:
74  properties:
75    compatible:
76      contains:
77        enum:
78          - renesas,riic-r9a07g044
79          - renesas,riic-r9a07g054
80then:
81  required:
82    - resets
83
84unevaluatedProperties: false
85
86examples:
87  - |
88    #include <dt-bindings/clock/r7s72100-clock.h>
89    #include <dt-bindings/interrupt-controller/arm-gic.h>
90
91    i2c0: i2c@fcfee000 {
92            compatible = "renesas,riic-r7s72100", "renesas,riic-rz";
93            reg = <0xfcfee000 0x44>;
94            interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
95                         <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>,
96                         <GIC_SPI 159 IRQ_TYPE_EDGE_RISING>,
97                         <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
98                         <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
99                         <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
100                         <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
101                         <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
102            interrupt-names = "tei", "ri", "ti", "spi", "sti", "naki", "ali",
103                              "tmoi";
104            clocks = <&mstp9_clks R7S72100_CLK_I2C0>;
105            clock-frequency = <100000>;
106            power-domains = <&cpg_clocks>;
107            #address-cells = <1>;
108            #size-cells = <0>;
109    };
110