xref: /linux/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml (revision ae8f4223b15227ec054bdb8a6247ce5b54d6e48e)
1*ae8f4223SKuldeep Singh# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*ae8f4223SKuldeep Singh%YAML 1.2
3*ae8f4223SKuldeep Singh---
4*ae8f4223SKuldeep Singh$id: "http://devicetree.org/schemas/i2c/qcom,i2c-geni-qcom.yaml#"
5*ae8f4223SKuldeep Singh$schema: "http://devicetree.org/meta-schemas/core.yaml#"
6*ae8f4223SKuldeep Singh
7*ae8f4223SKuldeep Singhtitle: Qualcomm Geni based QUP I2C Controller
8*ae8f4223SKuldeep Singh
9*ae8f4223SKuldeep Singhmaintainers:
10*ae8f4223SKuldeep Singh  - Andy Gross <agross@kernel.org>
11*ae8f4223SKuldeep Singh  - Bjorn Andersson <bjorn.andersson@linaro.org>
12*ae8f4223SKuldeep Singh
13*ae8f4223SKuldeep SinghallOf:
14*ae8f4223SKuldeep Singh  - $ref: /schemas/i2c/i2c-controller.yaml#
15*ae8f4223SKuldeep Singh
16*ae8f4223SKuldeep Singhproperties:
17*ae8f4223SKuldeep Singh  compatible:
18*ae8f4223SKuldeep Singh    const: qcom,geni-i2c
19*ae8f4223SKuldeep Singh
20*ae8f4223SKuldeep Singh  clocks:
21*ae8f4223SKuldeep Singh    maxItems: 1
22*ae8f4223SKuldeep Singh
23*ae8f4223SKuldeep Singh  clock-names:
24*ae8f4223SKuldeep Singh    const: se
25*ae8f4223SKuldeep Singh
26*ae8f4223SKuldeep Singh  clock-frequency:
27*ae8f4223SKuldeep Singh    default: 100000
28*ae8f4223SKuldeep Singh
29*ae8f4223SKuldeep Singh  dmas:
30*ae8f4223SKuldeep Singh    maxItems: 2
31*ae8f4223SKuldeep Singh
32*ae8f4223SKuldeep Singh  dma-names:
33*ae8f4223SKuldeep Singh    items:
34*ae8f4223SKuldeep Singh      - const: tx
35*ae8f4223SKuldeep Singh      - const: rx
36*ae8f4223SKuldeep Singh
37*ae8f4223SKuldeep Singh  interconnects:
38*ae8f4223SKuldeep Singh    maxItems: 3
39*ae8f4223SKuldeep Singh
40*ae8f4223SKuldeep Singh  interconnect-names:
41*ae8f4223SKuldeep Singh    items:
42*ae8f4223SKuldeep Singh      - const: qup-core
43*ae8f4223SKuldeep Singh      - const: qup-config
44*ae8f4223SKuldeep Singh      - const: qup-memory
45*ae8f4223SKuldeep Singh
46*ae8f4223SKuldeep Singh  interrupts:
47*ae8f4223SKuldeep Singh    maxItems: 1
48*ae8f4223SKuldeep Singh
49*ae8f4223SKuldeep Singh  pinctrl-0: true
50*ae8f4223SKuldeep Singh  pinctrl-1: true
51*ae8f4223SKuldeep Singh
52*ae8f4223SKuldeep Singh  pinctrl-names:
53*ae8f4223SKuldeep Singh    minItems: 1
54*ae8f4223SKuldeep Singh    items:
55*ae8f4223SKuldeep Singh      - const: default
56*ae8f4223SKuldeep Singh      - const: sleep
57*ae8f4223SKuldeep Singh
58*ae8f4223SKuldeep Singh  power-domains:
59*ae8f4223SKuldeep Singh    maxItems: 1
60*ae8f4223SKuldeep Singh
61*ae8f4223SKuldeep Singh  reg:
62*ae8f4223SKuldeep Singh    maxItems: 1
63*ae8f4223SKuldeep Singh
64*ae8f4223SKuldeep Singh  required-opps:
65*ae8f4223SKuldeep Singh    maxItems: 1
66*ae8f4223SKuldeep Singh
67*ae8f4223SKuldeep Singhrequired:
68*ae8f4223SKuldeep Singh  - compatible
69*ae8f4223SKuldeep Singh  - interrupts
70*ae8f4223SKuldeep Singh  - clocks
71*ae8f4223SKuldeep Singh  - clock-names
72*ae8f4223SKuldeep Singh  - reg
73*ae8f4223SKuldeep Singh
74*ae8f4223SKuldeep SinghunevaluatedProperties: false
75*ae8f4223SKuldeep Singh
76*ae8f4223SKuldeep Singhexamples:
77*ae8f4223SKuldeep Singh  - |
78*ae8f4223SKuldeep Singh    #include <dt-bindings/interrupt-controller/arm-gic.h>
79*ae8f4223SKuldeep Singh    #include <dt-bindings/clock/qcom,gcc-sc7180.h>
80*ae8f4223SKuldeep Singh    #include <dt-bindings/interconnect/qcom,sc7180.h>
81*ae8f4223SKuldeep Singh    #include <dt-bindings/power/qcom-rpmpd.h>
82*ae8f4223SKuldeep Singh
83*ae8f4223SKuldeep Singh    i2c@88000 {
84*ae8f4223SKuldeep Singh        compatible = "qcom,geni-i2c";
85*ae8f4223SKuldeep Singh        reg = <0x00880000 0x4000>;
86*ae8f4223SKuldeep Singh        clock-names = "se";
87*ae8f4223SKuldeep Singh        clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
88*ae8f4223SKuldeep Singh        pinctrl-names = "default";
89*ae8f4223SKuldeep Singh        pinctrl-0 = <&qup_i2c0_default>;
90*ae8f4223SKuldeep Singh        interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
91*ae8f4223SKuldeep Singh        #address-cells = <1>;
92*ae8f4223SKuldeep Singh        #size-cells = <0>;
93*ae8f4223SKuldeep Singh        interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
94*ae8f4223SKuldeep Singh                        <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>,
95*ae8f4223SKuldeep Singh                        <&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
96*ae8f4223SKuldeep Singh        interconnect-names = "qup-core", "qup-config", "qup-memory";
97*ae8f4223SKuldeep Singh        power-domains = <&rpmhpd SC7180_CX>;
98*ae8f4223SKuldeep Singh        required-opps = <&rpmhpd_opp_low_svs>;
99*ae8f4223SKuldeep Singh    };
100*ae8f4223SKuldeep Singh...
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