1*16c4c524SWolfram SangCE4100 I2C 2*16c4c524SWolfram Sang---------- 3*16c4c524SWolfram Sang 4*16c4c524SWolfram SangCE4100 has one PCI device which is described as the I2C-Controller. This 5*16c4c524SWolfram SangPCI device has three PCI-bars, each bar contains a complete I2C 6*16c4c524SWolfram Sangcontroller. So we have a total of three independent I2C-Controllers 7*16c4c524SWolfram Sangwhich share only an interrupt line. 8*16c4c524SWolfram SangThe driver is probed via the PCI-ID and is gathering the information of 9*16c4c524SWolfram Sangattached devices from the devices tree. 10*16c4c524SWolfram SangGrant Likely recommended to use the ranges property to map the PCI-Bar 11*16c4c524SWolfram Sangnumber to its physical address and to use this to find the child nodes 12*16c4c524SWolfram Sangof the specific I2C controller. This were his exact words: 13*16c4c524SWolfram Sang 14*16c4c524SWolfram Sang Here's where the magic happens. Each entry in 15*16c4c524SWolfram Sang ranges describes how the parent pci address space 16*16c4c524SWolfram Sang (middle group of 3) is translated to the local 17*16c4c524SWolfram Sang address space (first group of 2) and the size of 18*16c4c524SWolfram Sang each range (last cell). In this particular case, 19*16c4c524SWolfram Sang the first cell of the local address is chosen to be 20*16c4c524SWolfram Sang 1:1 mapped to the BARs, and the second is the 21*16c4c524SWolfram Sang offset from be base of the BAR (which would be 22*16c4c524SWolfram Sang non-zero if you had 2 or more devices mapped off 23*16c4c524SWolfram Sang the same BAR) 24*16c4c524SWolfram Sang 25*16c4c524SWolfram Sang ranges allows the address mapping to be described 26*16c4c524SWolfram Sang in a way that the OS can interpret without 27*16c4c524SWolfram Sang requiring custom device driver code. 28*16c4c524SWolfram Sang 29*16c4c524SWolfram SangThis is an example which is used on FalconFalls: 30*16c4c524SWolfram Sang------------------------------------------------ 31*16c4c524SWolfram Sang i2c-controller@b,2 { 32*16c4c524SWolfram Sang #address-cells = <2>; 33*16c4c524SWolfram Sang #size-cells = <1>; 34*16c4c524SWolfram Sang compatible = "pci8086,2e68.2", 35*16c4c524SWolfram Sang "pci8086,2e68", 36*16c4c524SWolfram Sang "pciclass,ff0000", 37*16c4c524SWolfram Sang "pciclass,ff00"; 38*16c4c524SWolfram Sang 39*16c4c524SWolfram Sang reg = <0x15a00 0x0 0x0 0x0 0x0>; 40*16c4c524SWolfram Sang interrupts = <16 1>; 41*16c4c524SWolfram Sang 42*16c4c524SWolfram Sang /* as described by Grant, the first number in the group of 43*16c4c524SWolfram Sang * three is the bar number followed by the 64bit bar address 44*16c4c524SWolfram Sang * followed by size of the mapping. The bar address 45*16c4c524SWolfram Sang * requires also a valid translation in parents ranges 46*16c4c524SWolfram Sang * property. 47*16c4c524SWolfram Sang */ 48*16c4c524SWolfram Sang ranges = <0 0 0x02000000 0 0xdffe0500 0x100 49*16c4c524SWolfram Sang 1 0 0x02000000 0 0xdffe0600 0x100 50*16c4c524SWolfram Sang 2 0 0x02000000 0 0xdffe0700 0x100>; 51*16c4c524SWolfram Sang 52*16c4c524SWolfram Sang i2c@0 { 53*16c4c524SWolfram Sang #address-cells = <1>; 54*16c4c524SWolfram Sang #size-cells = <0>; 55*16c4c524SWolfram Sang compatible = "intel,ce4100-i2c-controller"; 56*16c4c524SWolfram Sang 57*16c4c524SWolfram Sang /* The first number in the reg property is the 58*16c4c524SWolfram Sang * number of the bar 59*16c4c524SWolfram Sang */ 60*16c4c524SWolfram Sang reg = <0 0 0x100>; 61*16c4c524SWolfram Sang 62*16c4c524SWolfram Sang /* This I2C controller has no devices */ 63*16c4c524SWolfram Sang }; 64*16c4c524SWolfram Sang 65*16c4c524SWolfram Sang i2c@1 { 66*16c4c524SWolfram Sang #address-cells = <1>; 67*16c4c524SWolfram Sang #size-cells = <0>; 68*16c4c524SWolfram Sang compatible = "intel,ce4100-i2c-controller"; 69*16c4c524SWolfram Sang reg = <1 0 0x100>; 70*16c4c524SWolfram Sang 71*16c4c524SWolfram Sang /* This I2C controller has one gpio controller */ 72*16c4c524SWolfram Sang gpio@26 { 73*16c4c524SWolfram Sang #gpio-cells = <2>; 74*16c4c524SWolfram Sang compatible = "ti,pcf8575"; 75*16c4c524SWolfram Sang reg = <0x26>; 76*16c4c524SWolfram Sang gpio-controller; 77*16c4c524SWolfram Sang }; 78*16c4c524SWolfram Sang }; 79*16c4c524SWolfram Sang 80*16c4c524SWolfram Sang i2c@2 { 81*16c4c524SWolfram Sang #address-cells = <1>; 82*16c4c524SWolfram Sang #size-cells = <0>; 83*16c4c524SWolfram Sang compatible = "intel,ce4100-i2c-controller"; 84*16c4c524SWolfram Sang reg = <2 0 0x100>; 85*16c4c524SWolfram Sang 86*16c4c524SWolfram Sang gpio@26 { 87*16c4c524SWolfram Sang #gpio-cells = <2>; 88*16c4c524SWolfram Sang compatible = "ti,pcf8575"; 89*16c4c524SWolfram Sang reg = <0x26>; 90*16c4c524SWolfram Sang gpio-controller; 91*16c4c524SWolfram Sang }; 92*16c4c524SWolfram Sang }; 93*16c4c524SWolfram Sang }; 94