xref: /linux/Documentation/devicetree/bindings/i2c/i2c-pxa-pci-ce4100.txt (revision 762f99f4f3cb41a775b5157dd761217beba65873)
116c4c524SWolfram SangCE4100 I2C
216c4c524SWolfram Sang----------
316c4c524SWolfram Sang
416c4c524SWolfram SangCE4100 has one PCI device which is described as the I2C-Controller. This
516c4c524SWolfram SangPCI device has three PCI-bars, each bar contains a complete I2C
616c4c524SWolfram Sangcontroller. So we have a total of three independent I2C-Controllers
716c4c524SWolfram Sangwhich share only an interrupt line.
816c4c524SWolfram SangThe driver is probed via the PCI-ID and is gathering the information of
916c4c524SWolfram Sangattached devices from the devices tree.
1016c4c524SWolfram SangGrant Likely recommended to use the ranges property to map the PCI-Bar
1116c4c524SWolfram Sangnumber to its physical address and to use this to find the child nodes
1216c4c524SWolfram Sangof the specific I2C controller. This were his exact words:
1316c4c524SWolfram Sang
1416c4c524SWolfram Sang       Here's where the magic happens.  Each entry in
1516c4c524SWolfram Sang       ranges describes how the parent pci address space
1616c4c524SWolfram Sang       (middle group of 3) is translated to the local
1716c4c524SWolfram Sang       address space (first group of 2) and the size of
1816c4c524SWolfram Sang       each range (last cell).  In this particular case,
1916c4c524SWolfram Sang       the first cell of the local address is chosen to be
2016c4c524SWolfram Sang       1:1 mapped to the BARs, and the second is the
2116c4c524SWolfram Sang       offset from be base of the BAR (which would be
2216c4c524SWolfram Sang       non-zero if you had 2 or more devices mapped off
2316c4c524SWolfram Sang       the same BAR)
2416c4c524SWolfram Sang
2516c4c524SWolfram Sang       ranges allows the address mapping to be described
2616c4c524SWolfram Sang       in a way that the OS can interpret without
2716c4c524SWolfram Sang       requiring custom device driver code.
2816c4c524SWolfram Sang
2916c4c524SWolfram SangThis is an example which is used on FalconFalls:
3016c4c524SWolfram Sang------------------------------------------------
3116c4c524SWolfram Sang	i2c-controller@b,2 {
3216c4c524SWolfram Sang		#address-cells = <2>;
3316c4c524SWolfram Sang		#size-cells = <1>;
3416c4c524SWolfram Sang		compatible = "pci8086,2e68.2",
3516c4c524SWolfram Sang				"pci8086,2e68",
3616c4c524SWolfram Sang				"pciclass,ff0000",
3716c4c524SWolfram Sang				"pciclass,ff00";
3816c4c524SWolfram Sang
3916c4c524SWolfram Sang		reg = <0x15a00 0x0 0x0 0x0 0x0>;
4016c4c524SWolfram Sang		interrupts = <16 1>;
4116c4c524SWolfram Sang
4216c4c524SWolfram Sang		/* as described by Grant, the first number in the group of
4316c4c524SWolfram Sang		* three is the bar number followed by the 64bit bar address
4416c4c524SWolfram Sang		* followed by size of the mapping. The bar address
4516c4c524SWolfram Sang		* requires also a valid translation in parents ranges
4616c4c524SWolfram Sang		* property.
4716c4c524SWolfram Sang		*/
4816c4c524SWolfram Sang		ranges = <0 0   0x02000000 0 0xdffe0500 0x100
4916c4c524SWolfram Sang			  1 0   0x02000000 0 0xdffe0600 0x100
5016c4c524SWolfram Sang			  2 0   0x02000000 0 0xdffe0700 0x100>;
5116c4c524SWolfram Sang
5216c4c524SWolfram Sang		i2c@0 {
5316c4c524SWolfram Sang			#address-cells = <1>;
5416c4c524SWolfram Sang			#size-cells = <0>;
5516c4c524SWolfram Sang			compatible = "intel,ce4100-i2c-controller";
5616c4c524SWolfram Sang
5716c4c524SWolfram Sang			/* The first number in the reg property is the
5816c4c524SWolfram Sang			* number of the bar
5916c4c524SWolfram Sang			*/
6016c4c524SWolfram Sang			reg = <0 0 0x100>;
6116c4c524SWolfram Sang
6216c4c524SWolfram Sang			/* This I2C controller has no devices */
6316c4c524SWolfram Sang		};
6416c4c524SWolfram Sang
6516c4c524SWolfram Sang		i2c@1 {
6616c4c524SWolfram Sang			#address-cells = <1>;
6716c4c524SWolfram Sang			#size-cells = <0>;
6816c4c524SWolfram Sang			compatible = "intel,ce4100-i2c-controller";
6916c4c524SWolfram Sang			reg = <1 0 0x100>;
7016c4c524SWolfram Sang
7116c4c524SWolfram Sang			/* This I2C controller has one gpio controller */
7216c4c524SWolfram Sang			gpio@26 {
7316c4c524SWolfram Sang				#gpio-cells = <2>;
74*4aa908feSGeert Uytterhoeven				compatible = "nxp,pcf8575";
7516c4c524SWolfram Sang				reg = <0x26>;
7616c4c524SWolfram Sang				gpio-controller;
7716c4c524SWolfram Sang			};
7816c4c524SWolfram Sang		};
7916c4c524SWolfram Sang
8016c4c524SWolfram Sang		i2c@2 {
8116c4c524SWolfram Sang			#address-cells = <1>;
8216c4c524SWolfram Sang			#size-cells = <0>;
8316c4c524SWolfram Sang			compatible = "intel,ce4100-i2c-controller";
8416c4c524SWolfram Sang			reg = <2 0 0x100>;
8516c4c524SWolfram Sang
8616c4c524SWolfram Sang			gpio@26 {
8716c4c524SWolfram Sang				#gpio-cells = <2>;
88*4aa908feSGeert Uytterhoeven				compatible = "nxp,pcf8575";
8916c4c524SWolfram Sang				reg = <0x26>;
9016c4c524SWolfram Sang				gpio-controller;
9116c4c524SWolfram Sang			};
9216c4c524SWolfram Sang		};
9316c4c524SWolfram Sang	};
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