1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/i2c/i2c-mt65xx.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: MediaTek I2C controller 8 9description: 10 This driver interfaces with the native I2C controller present in 11 various MediaTek SoCs. 12 13allOf: 14 - $ref: /schemas/i2c/i2c-controller.yaml# 15 16maintainers: 17 - Qii Wang <qii.wang@mediatek.com> 18 19properties: 20 compatible: 21 oneOf: 22 - const: mediatek,mt2712-i2c 23 - const: mediatek,mt6577-i2c 24 - const: mediatek,mt6589-i2c 25 - const: mediatek,mt7622-i2c 26 - const: mediatek,mt7981-i2c 27 - const: mediatek,mt7986-i2c 28 - const: mediatek,mt8168-i2c 29 - const: mediatek,mt8173-i2c 30 - const: mediatek,mt8183-i2c 31 - const: mediatek,mt8186-i2c 32 - const: mediatek,mt8188-i2c 33 - const: mediatek,mt8192-i2c 34 - items: 35 - enum: 36 - mediatek,mt7629-i2c 37 - mediatek,mt8516-i2c 38 - const: mediatek,mt2712-i2c 39 - items: 40 - enum: 41 - mediatek,mt2701-i2c 42 - mediatek,mt6797-i2c 43 - mediatek,mt7623-i2c 44 - const: mediatek,mt6577-i2c 45 - items: 46 - enum: 47 - mediatek,mt8365-i2c 48 - const: mediatek,mt8168-i2c 49 - items: 50 - enum: 51 - mediatek,mt6795-i2c 52 - const: mediatek,mt8173-i2c 53 - items: 54 - enum: 55 - mediatek,mt6878-i2c 56 - mediatek,mt6991-i2c 57 - mediatek,mt8189-i2c 58 - mediatek,mt8196-i2c 59 - const: mediatek,mt8188-i2c 60 - items: 61 - enum: 62 - mediatek,mt6893-i2c 63 - mediatek,mt8195-i2c 64 - const: mediatek,mt8192-i2c 65 66 reg: 67 items: 68 - description: Physical base address 69 - description: DMA base address 70 71 interrupts: 72 maxItems: 1 73 74 clocks: 75 minItems: 2 76 items: 77 - description: Main clock for I2C bus 78 - description: Clock for I2C via DMA 79 - description: Bus arbitrator clock 80 - description: Clock for I2C from PMIC 81 82 clock-names: 83 minItems: 2 84 items: 85 - const: main 86 - const: dma 87 - const: arb 88 - const: pmic 89 90 clock-div: 91 $ref: /schemas/types.yaml#/definitions/uint32 92 description: Frequency divider of clock source in I2C module 93 94 clock-frequency: 95 default: 100000 96 description: 97 SCL frequency to use (in Hz). If omitted, 100kHz is used. 98 99 mediatek,have-pmic: 100 description: Platform controls I2C from PMIC side 101 type: boolean 102 103 mediatek,use-push-pull: 104 description: Use push-pull mode I/O config 105 type: boolean 106 107 vbus-supply: 108 description: Phandle to the regulator providing power to SCL/SDA 109 110required: 111 - compatible 112 - reg 113 - clocks 114 - clock-names 115 - clock-div 116 - interrupts 117 118unevaluatedProperties: false 119 120examples: 121 - | 122 #include <dt-bindings/interrupt-controller/arm-gic.h> 123 #include <dt-bindings/interrupt-controller/irq.h> 124 125 i2c0: i2c@1100d000 { 126 compatible = "mediatek,mt6577-i2c"; 127 reg = <0x1100d000 0x70>, <0x11000300 0x80>; 128 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_LOW>; 129 clocks = <&i2c0_ck>, <&ap_dma_ck>; 130 clock-names = "main", "dma"; 131 clock-div = <16>; 132 clock-frequency = <400000>; 133 mediatek,have-pmic; 134 135 #address-cells = <1>; 136 #size-cells = <0>; 137 }; 138