xref: /linux/Documentation/devicetree/bindings/i2c/i2c-imx.yaml (revision 441977979a78bffe51b13932d353919b1fb20c14) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/i2c/i2c-imx.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale Inter IC (I2C) and High Speed Inter IC (HS-I2C) for i.MX
8
9maintainers:
10  - Wolfram Sang <wolfram@the-dreams.de>
11
12properties:
13  compatible:
14    oneOf:
15      - const: fsl,imx1-i2c
16      - const: fsl,imx21-i2c
17      - const: fsl,vf610-i2c
18      - items:
19          - const: fsl,imx35-i2c
20          - const: fsl,imx1-i2c
21      - items:
22          - enum:
23            - fsl,imx25-i2c
24            - fsl,imx27-i2c
25            - fsl,imx31-i2c
26            - fsl,imx50-i2c
27            - fsl,imx51-i2c
28            - fsl,imx53-i2c
29            - fsl,imx6q-i2c
30            - fsl,imx6sl-i2c
31            - fsl,imx6sx-i2c
32            - fsl,imx6sll-i2c
33            - fsl,imx6ul-i2c
34            - fsl,imx7s-i2c
35            - fsl,imx8mq-i2c
36            - fsl,imx8mm-i2c
37            - fsl,imx8mn-i2c
38            - fsl,imx8mp-i2c
39          - const: fsl,imx21-i2c
40
41  reg:
42    maxItems: 1
43
44  interrupts:
45    maxItems: 1
46
47  clocks:
48    maxItems: 1
49
50  clock-names:
51    const: ipg
52
53  clock-frequency:
54    enum: [ 100000, 400000 ]
55
56  dmas:
57    items:
58      - description: DMA controller phandle and request line for RX
59      - description: DMA controller phandle and request line for TX
60
61  dma-names:
62    items:
63      - const: rx
64      - const: tx
65
66  sda-gpios:
67    maxItems: 1
68
69  scl-gpios:
70    maxItems: 1
71
72required:
73  - compatible
74  - reg
75  - interrupts
76  - clocks
77
78additionalProperties: false
79
80examples:
81  - |
82    #include <dt-bindings/clock/imx5-clock.h>
83    #include <dt-bindings/clock/vf610-clock.h>
84    #include <dt-bindings/gpio/gpio.h>
85    #include <dt-bindings/interrupt-controller/arm-gic.h>
86
87    i2c@83fc4000 {
88        compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
89        reg = <0x83fc4000 0x4000>;
90        interrupts = <63>;
91        clocks = <&clks IMX5_CLK_I2C2_GATE>;
92    };
93
94    i2c@40066000 {
95        compatible = "fsl,vf610-i2c";
96        reg = <0x40066000 0x1000>;
97        interrupts = <71 IRQ_TYPE_LEVEL_HIGH>;
98        clocks = <&clks VF610_CLK_I2C0>;
99        clock-names = "ipg";
100        dmas = <&edma0 0 50>,
101               <&edma0 0 51>;
102        dma-names = "rx", "tx";
103    };
104