1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/i2c/i2c-exynos5.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Samsung's High Speed I2C controller 8 9maintainers: 10 - Krzysztof Kozlowski <krzk@kernel.org> 11 12description: | 13 The Samsung's High Speed I2C controller is used to interface with I2C devices 14 at various speeds ranging from 100kHz to 3.4MHz. 15 16 In case the HSI2C controller is encapsulated within USI block (it's the case 17 e.g. for Exynos850 and Exynos Auto V9 SoCs), it might be also necessary to 18 define USI node in device tree file, choosing "i2c" configuration. Please see 19 Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml for details. 20 21properties: 22 compatible: 23 oneOf: 24 - enum: 25 - samsung,exynos5250-hsi2c # Exynos5250 and Exynos5420 26 - samsung,exynos5260-hsi2c # Exynos5260 27 - samsung,exynos7-hsi2c # Exynos7 28 - samsung,exynos8895-hsi2c 29 - samsung,exynosautov9-hsi2c 30 - items: 31 - enum: 32 - samsung,exynos5433-hsi2c 33 - samsung,exynos7870-hsi2c 34 - tesla,fsd-hsi2c 35 - const: samsung,exynos7-hsi2c 36 - items: 37 - enum: 38 - google,gs101-hsi2c 39 - samsung,exynos2200-hsi2c 40 - samsung,exynos850-hsi2c 41 - const: samsung,exynosautov9-hsi2c 42 - const: samsung,exynos5-hsi2c # Exynos5250 and Exynos5420 43 deprecated: true 44 45 reg: 46 maxItems: 1 47 48 interrupts: 49 maxItems: 1 50 51 clock-frequency: 52 default: 100000 53 description: 54 Desired operating frequency in Hz of the bus. 55 56 If not specified, the bus operates in fast-speed mode at 100kHz. 57 58 If specified, the bus operates in high-speed mode only if the 59 clock-frequency is >= 1MHz. 60 61 clocks: 62 minItems: 1 63 items: 64 - description: I2C operating clock 65 - description: Bus clock (APB) 66 67 clock-names: 68 minItems: 1 69 items: 70 - const: hsi2c 71 - const: hsi2c_pclk 72 73required: 74 - compatible 75 - reg 76 - interrupts 77 - clocks 78 79allOf: 80 - $ref: /schemas/i2c/i2c-controller.yaml# 81 - if: 82 properties: 83 compatible: 84 contains: 85 enum: 86 - samsung,exynosautov9-hsi2c 87 88 then: 89 properties: 90 clocks: 91 minItems: 2 92 93 clock-names: 94 minItems: 2 95 96 required: 97 - clock-names 98 99 else: 100 properties: 101 clocks: 102 maxItems: 1 103 104unevaluatedProperties: false 105 106examples: 107 - | 108 #include <dt-bindings/clock/exynos5420.h> 109 #include <dt-bindings/interrupt-controller/arm-gic.h> 110 #include <dt-bindings/interrupt-controller/irq.h> 111 112 hsi2c_8: i2c@12e00000 { 113 compatible = "samsung,exynos5250-hsi2c"; 114 reg = <0x12e00000 0x1000>; 115 interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; 116 #address-cells = <1>; 117 #size-cells = <0>; 118 clock-frequency = <100000>; 119 clocks = <&clock CLK_USI4>; 120 clock-names = "hsi2c"; 121 122 pmic@66 { 123 /* compatible = "samsung,s2mps11-pmic"; */ 124 reg = <0x66>; 125 }; 126 }; 127 128 - | 129 #include <dt-bindings/clock/exynos850.h> 130 #include <dt-bindings/interrupt-controller/arm-gic.h> 131 132 hsi2c_2: i2c@138c0000 { 133 compatible = "samsung,exynosautov9-hsi2c"; 134 reg = <0x138c0000 0xc0>; 135 interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>; 136 #address-cells = <1>; 137 #size-cells = <0>; 138 clocks = <&cmu_peri CLK_GOUT_HSI2C2_IPCLK>, 139 <&cmu_peri CLK_GOUT_HSI2C2_PCLK>; 140 clock-names = "hsi2c", "hsi2c_pclk"; 141 142 pmic@66 { 143 /* compatible = "samsung,s2mps11-pmic"; */ 144 reg = <0x66>; 145 }; 146 }; 147