1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/i2c/i2c-exynos5.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Samsung's High Speed I2C controller 8 9maintainers: 10 - Krzysztof Kozlowski <krzk@kernel.org> 11 12description: | 13 The Samsung's High Speed I2C controller is used to interface with I2C devices 14 at various speeds ranging from 100kHz to 3.4MHz. 15 16 In case the HSI2C controller is encapsulated within USI block (it's the case 17 e.g. for Exynos850 and Exynos Auto V9 SoCs), it might be also necessary to 18 define USI node in device tree file, choosing "i2c" configuration. Please see 19 Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml for details. 20 21properties: 22 compatible: 23 oneOf: 24 - enum: 25 - samsung,exynos5250-hsi2c # Exynos5250 and Exynos5420 26 - samsung,exynos5260-hsi2c # Exynos5260 27 - samsung,exynos7-hsi2c # Exynos7 28 - samsung,exynos8895-hsi2c 29 - samsung,exynosautov9-hsi2c 30 - items: 31 - enum: 32 - samsung,exynos5433-hsi2c 33 - samsung,exynos7870-hsi2c 34 - tesla,fsd-hsi2c 35 - const: samsung,exynos7-hsi2c 36 - items: 37 - enum: 38 - samsung,exynos8890-hsi2c 39 - const: samsung,exynos8895-hsi2c 40 - items: 41 - enum: 42 - google,gs101-hsi2c 43 - samsung,exynos2200-hsi2c 44 - samsung,exynos850-hsi2c 45 - samsung,exynos990-hsi2c 46 - const: samsung,exynosautov9-hsi2c 47 - const: samsung,exynos5-hsi2c # Exynos5250 and Exynos5420 48 deprecated: true 49 50 reg: 51 maxItems: 1 52 53 interrupts: 54 maxItems: 1 55 56 clock-frequency: 57 default: 100000 58 description: 59 Desired operating frequency in Hz of the bus. 60 61 If not specified, the bus operates in fast-speed mode at 100kHz. 62 63 If specified, the bus operates in high-speed mode only if the 64 clock-frequency is >= 1MHz. 65 66 clocks: 67 minItems: 1 68 items: 69 - description: I2C operating clock 70 - description: Bus clock (APB) 71 72 clock-names: 73 minItems: 1 74 items: 75 - const: hsi2c 76 - const: hsi2c_pclk 77 78required: 79 - compatible 80 - reg 81 - interrupts 82 - clocks 83 84allOf: 85 - $ref: /schemas/i2c/i2c-controller.yaml# 86 - if: 87 properties: 88 compatible: 89 contains: 90 enum: 91 - samsung,exynosautov9-hsi2c 92 93 then: 94 properties: 95 clocks: 96 minItems: 2 97 98 clock-names: 99 minItems: 2 100 101 required: 102 - clock-names 103 104 else: 105 properties: 106 clocks: 107 maxItems: 1 108 109unevaluatedProperties: false 110 111examples: 112 - | 113 #include <dt-bindings/clock/exynos5420.h> 114 #include <dt-bindings/interrupt-controller/arm-gic.h> 115 #include <dt-bindings/interrupt-controller/irq.h> 116 117 hsi2c_8: i2c@12e00000 { 118 compatible = "samsung,exynos5250-hsi2c"; 119 reg = <0x12e00000 0x1000>; 120 interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; 121 #address-cells = <1>; 122 #size-cells = <0>; 123 clock-frequency = <100000>; 124 clocks = <&clock CLK_USI4>; 125 clock-names = "hsi2c"; 126 127 pmic@66 { 128 /* compatible = "samsung,s2mps11-pmic"; */ 129 reg = <0x66>; 130 }; 131 }; 132 133 - | 134 #include <dt-bindings/clock/exynos850.h> 135 #include <dt-bindings/interrupt-controller/arm-gic.h> 136 137 hsi2c_2: i2c@138c0000 { 138 compatible = "samsung,exynosautov9-hsi2c"; 139 reg = <0x138c0000 0xc0>; 140 interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>; 141 #address-cells = <1>; 142 #size-cells = <0>; 143 clocks = <&cmu_peri CLK_GOUT_HSI2C2_IPCLK>, 144 <&cmu_peri CLK_GOUT_HSI2C2_PCLK>; 145 clock-names = "hsi2c", "hsi2c_pclk"; 146 147 pmic@66 { 148 /* compatible = "samsung,s2mps11-pmic"; */ 149 reg = <0x66>; 150 }; 151 }; 152