1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/i2c/i2c-exynos5.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Samsung's High Speed I2C controller 8 9maintainers: 10 - Krzysztof Kozlowski <krzk@kernel.org> 11 12description: | 13 The Samsung's High Speed I2C controller is used to interface with I2C devices 14 at various speeds ranging from 100kHz to 3.4MHz. 15 16 In case the HSI2C controller is encapsulated within USI block (it's the case 17 e.g. for Exynos850 and Exynos Auto V9 SoCs), it might be also necessary to 18 define USI node in device tree file, choosing "i2c" configuration. Please see 19 Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml for details. 20 21properties: 22 compatible: 23 oneOf: 24 - enum: 25 - samsung,exynos5250-hsi2c # Exynos5250 and Exynos5420 26 - samsung,exynos5260-hsi2c # Exynos5260 27 - samsung,exynos7-hsi2c # Exynos7 28 - samsung,exynosautov9-hsi2c 29 - items: 30 - enum: 31 - samsung,exynos5433-hsi2c 32 - tesla,fsd-hsi2c 33 - const: samsung,exynos7-hsi2c 34 - items: 35 - enum: 36 - google,gs101-hsi2c 37 - samsung,exynos850-hsi2c 38 - const: samsung,exynosautov9-hsi2c 39 - const: samsung,exynos5-hsi2c # Exynos5250 and Exynos5420 40 deprecated: true 41 42 reg: 43 maxItems: 1 44 45 interrupts: 46 maxItems: 1 47 48 clock-frequency: 49 default: 100000 50 description: 51 Desired operating frequency in Hz of the bus. 52 53 If not specified, the bus operates in fast-speed mode at 100kHz. 54 55 If specified, the bus operates in high-speed mode only if the 56 clock-frequency is >= 1MHz. 57 58 clocks: 59 minItems: 1 60 items: 61 - description: I2C operating clock 62 - description: Bus clock (APB) 63 64 clock-names: 65 minItems: 1 66 items: 67 - const: hsi2c 68 - const: hsi2c_pclk 69 70required: 71 - compatible 72 - reg 73 - interrupts 74 - clocks 75 76allOf: 77 - $ref: /schemas/i2c/i2c-controller.yaml# 78 - if: 79 properties: 80 compatible: 81 contains: 82 enum: 83 - samsung,exynosautov9-hsi2c 84 85 then: 86 properties: 87 clocks: 88 minItems: 2 89 90 clock-names: 91 minItems: 2 92 93 required: 94 - clock-names 95 96 else: 97 properties: 98 clocks: 99 maxItems: 1 100 101unevaluatedProperties: false 102 103examples: 104 - | 105 #include <dt-bindings/clock/exynos5420.h> 106 #include <dt-bindings/interrupt-controller/arm-gic.h> 107 #include <dt-bindings/interrupt-controller/irq.h> 108 109 hsi2c_8: i2c@12e00000 { 110 compatible = "samsung,exynos5250-hsi2c"; 111 reg = <0x12e00000 0x1000>; 112 interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; 113 #address-cells = <1>; 114 #size-cells = <0>; 115 clock-frequency = <100000>; 116 clocks = <&clock CLK_USI4>; 117 clock-names = "hsi2c"; 118 119 pmic@66 { 120 /* compatible = "samsung,s2mps11-pmic"; */ 121 reg = <0x66>; 122 }; 123 }; 124 125 - | 126 #include <dt-bindings/clock/exynos850.h> 127 #include <dt-bindings/interrupt-controller/arm-gic.h> 128 129 hsi2c_2: i2c@138c0000 { 130 compatible = "samsung,exynosautov9-hsi2c"; 131 reg = <0x138c0000 0xc0>; 132 interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>; 133 #address-cells = <1>; 134 #size-cells = <0>; 135 clocks = <&cmu_peri CLK_GOUT_HSI2C2_IPCLK>, 136 <&cmu_peri CLK_GOUT_HSI2C2_PCLK>; 137 clock-names = "hsi2c", "hsi2c_pclk"; 138 139 pmic@66 { 140 /* compatible = "samsung,s2mps11-pmic"; */ 141 reg = <0x66>; 142 }; 143 }; 144