xref: /linux/Documentation/devicetree/bindings/hwmon/aspeed-pwm-tacho.txt (revision 2fe05e1139a555ae91f00a812cb9520e7d3022ab)
1ASPEED AST2400/AST2500 PWM and Fan Tacho controller device driver
2
3The ASPEED PWM controller can support upto 8 PWM outputs. The ASPEED Fan Tacho
4controller can support upto 16 Fan tachometer inputs.
5
6There can be upto 8 fans supported. Each fan can have one PWM output and
7one/two Fan tach inputs.
8
9Required properties for pwm-tacho node:
10- #address-cells : should be 1.
11
12- #size-cells : should be 1.
13
14- reg : address and length of the register set for the device.
15
16- pinctrl-names : a pinctrl state named "default" must be defined.
17
18- pinctrl-0 : phandle referencing pin configuration of the PWM ports.
19
20- compatible : should be "aspeed,ast2400-pwm-tacho" for AST2400 and
21	       "aspeed,ast2500-pwm-tacho" for AST2500.
22
23- clocks : a fixed clock providing input clock frequency(PWM
24	   and Fan Tach clock)
25
26fan subnode format:
27===================
28Under fan subnode there can upto 8 child nodes, with each child node
29representing a fan. If there are 8 fans each fan can have one PWM port and
30one/two Fan tach inputs.
31
32Required properties for each child node:
33- reg : should specify PWM source port.
34	integer value in the range 0 to 7 with 0 indicating PWM port A and
35	7 indicating PWM port H.
36
37- aspeed,fan-tach-ch : should specify the Fan tach input channel.
38                integer value in the range 0 through 15, with 0 indicating
39		Fan tach channel 0 and 15 indicating Fan tach channel 15.
40		Atleast one Fan tach input channel is required.
41
42Examples:
43
44pwm_tacho_fixed_clk: fixedclk {
45	compatible = "fixed-clock";
46	#clock-cells = <0>;
47	clock-frequency = <24000000>;
48};
49
50pwm_tacho: pwmtachocontroller@1e786000 {
51	#address-cells = <1>;
52	#size-cells = <1>;
53	reg = <0x1E786000 0x1000>;
54	compatible = "aspeed,ast2500-pwm-tacho";
55	clocks = <&pwm_tacho_fixed_clk>;
56	pinctrl-names = "default";
57	pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default>;
58
59	fan@0 {
60		reg = <0x00>;
61		aspeed,fan-tach-ch = /bits/ 8 <0x00>;
62	};
63
64	fan@1 {
65		reg = <0x01>;
66		aspeed,fan-tach-ch = /bits/ 8 <0x01 0x02>;
67	};
68};
69