1*d07c41ebSNuno Sa# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*d07c41ebSNuno Sa%YAML 1.2 3*d07c41ebSNuno Sa--- 4*d07c41ebSNuno Sa$id: http://devicetree.org/schemas/hwmon/adi,ltc4282.yaml# 5*d07c41ebSNuno Sa$schema: http://devicetree.org/meta-schemas/core.yaml# 6*d07c41ebSNuno Sa 7*d07c41ebSNuno Satitle: Analog Devices LTC4282 I2C High Current Hot Swap Controller over I2C 8*d07c41ebSNuno Sa 9*d07c41ebSNuno Samaintainers: 10*d07c41ebSNuno Sa - Nuno Sa <nuno.sa@analog.com> 11*d07c41ebSNuno Sa 12*d07c41ebSNuno Sadescription: | 13*d07c41ebSNuno Sa Analog Devices LTC4282 I2C High Current Hot Swap Controller over I2C. 14*d07c41ebSNuno Sa 15*d07c41ebSNuno Sa https://www.analog.com/media/en/technical-documentation/data-sheets/ltc4282.pdf 16*d07c41ebSNuno Sa 17*d07c41ebSNuno Saproperties: 18*d07c41ebSNuno Sa compatible: 19*d07c41ebSNuno Sa enum: 20*d07c41ebSNuno Sa - adi,ltc4282 21*d07c41ebSNuno Sa 22*d07c41ebSNuno Sa reg: 23*d07c41ebSNuno Sa maxItems: 1 24*d07c41ebSNuno Sa 25*d07c41ebSNuno Sa vdd-supply: true 26*d07c41ebSNuno Sa 27*d07c41ebSNuno Sa clocks: 28*d07c41ebSNuno Sa maxItems: 1 29*d07c41ebSNuno Sa 30*d07c41ebSNuno Sa '#clock-cells': 31*d07c41ebSNuno Sa const: 0 32*d07c41ebSNuno Sa 33*d07c41ebSNuno Sa adi,rsense-nano-ohms: 34*d07c41ebSNuno Sa description: Value of the sense resistor. 35*d07c41ebSNuno Sa 36*d07c41ebSNuno Sa adi,vin-mode-microvolt: 37*d07c41ebSNuno Sa description: 38*d07c41ebSNuno Sa Selects operating range for the Undervoltage, Overvoltage and Foldback 39*d07c41ebSNuno Sa pins. Also for the ADC. Should be set to the nominal input voltage. 40*d07c41ebSNuno Sa enum: [3300000, 5000000, 12000000, 24000000] 41*d07c41ebSNuno Sa default: 12000000 42*d07c41ebSNuno Sa 43*d07c41ebSNuno Sa adi,fet-bad-timeout-ms: 44*d07c41ebSNuno Sa description: 45*d07c41ebSNuno Sa From the moment a FET bad conditions is present, this property selects the 46*d07c41ebSNuno Sa wait time/timeout for a FET-bad fault to be signaled. Setting this to 0, 47*d07c41ebSNuno Sa disables FET bad faults to be reported. 48*d07c41ebSNuno Sa default: 255 49*d07c41ebSNuno Sa maximum: 255 50*d07c41ebSNuno Sa 51*d07c41ebSNuno Sa adi,overvoltage-dividers: 52*d07c41ebSNuno Sa description: | 53*d07c41ebSNuno Sa Select which dividers to use for VDD Overvoltage detection. Note that 54*d07c41ebSNuno Sa when the internal dividers are used the threshold is referenced to VDD. 55*d07c41ebSNuno Sa The percentages in the datasheet are misleading since the actual values 56*d07c41ebSNuno Sa to look for are in the "Absolute Maximum Ratings" table in the 57*d07c41ebSNuno Sa "Comparator Inputs" section. In there there's a line for each of the 5%, 58*d07c41ebSNuno Sa 10% and 15% settings with the actual min, typical and max tolerances. 59*d07c41ebSNuno Sa $ref: /schemas/types.yaml#/definitions/string 60*d07c41ebSNuno Sa enum: [external, vdd_5_percent, vdd_10_percent, vdd_15_percent] 61*d07c41ebSNuno Sa default: external 62*d07c41ebSNuno Sa 63*d07c41ebSNuno Sa adi,undervoltage-dividers: 64*d07c41ebSNuno Sa description: | 65*d07c41ebSNuno Sa Select which dividers to use for VDD Overvoltage detection. Note that 66*d07c41ebSNuno Sa when the internal dividers are used the threshold is referenced to VDD. 67*d07c41ebSNuno Sa The percentages in the datasheet are misleading since the actual values 68*d07c41ebSNuno Sa to look for are in the "Absolute Maximum Ratings" table in the 69*d07c41ebSNuno Sa "Comparator Inputs" section. In there there's a line for each of the 5%, 70*d07c41ebSNuno Sa 10% and 15% settings with the actual min, typical and max tolerances. 71*d07c41ebSNuno Sa $ref: /schemas/types.yaml#/definitions/string 72*d07c41ebSNuno Sa enum: [external, vdd_5_percent, vdd_10_percent, vdd_15_percent] 73*d07c41ebSNuno Sa default: external 74*d07c41ebSNuno Sa 75*d07c41ebSNuno Sa adi,current-limit-sense-microvolt: 76*d07c41ebSNuno Sa description: 77*d07c41ebSNuno Sa The current limit sense voltage of the chip is adjustable between 78*d07c41ebSNuno Sa 12.5mV and 34.4mV in 3.1mV steps. This effectively limits the current 79*d07c41ebSNuno Sa on the load. 80*d07c41ebSNuno Sa enum: [12500, 15625, 18750, 21875, 25000, 28125, 31250, 34375] 81*d07c41ebSNuno Sa default: 25000 82*d07c41ebSNuno Sa 83*d07c41ebSNuno Sa adi,overcurrent-retry: 84*d07c41ebSNuno Sa description: 85*d07c41ebSNuno Sa If set, enables the chip to auto-retry 256 timer cycles after an 86*d07c41ebSNuno Sa Overcurrent fault. 87*d07c41ebSNuno Sa type: boolean 88*d07c41ebSNuno Sa 89*d07c41ebSNuno Sa adi,overvoltage-retry-disable: 90*d07c41ebSNuno Sa description: 91*d07c41ebSNuno Sa If set, disables the chip to auto-retry 50ms after an Overvoltage fault. 92*d07c41ebSNuno Sa It's enabled by default. 93*d07c41ebSNuno Sa type: boolean 94*d07c41ebSNuno Sa 95*d07c41ebSNuno Sa adi,undervoltage-retry-disable: 96*d07c41ebSNuno Sa description: 97*d07c41ebSNuno Sa If set, disables the chip to auto-retry 50ms after an Undervoltage fault. 98*d07c41ebSNuno Sa It's enabled by default. 99*d07c41ebSNuno Sa type: boolean 100*d07c41ebSNuno Sa 101*d07c41ebSNuno Sa adi,fault-log-enable: 102*d07c41ebSNuno Sa description: 103*d07c41ebSNuno Sa If set, enables the FAULT_LOG and ADC_ALERT_LOG registers to be written 104*d07c41ebSNuno Sa to the EEPROM when a fault bit transitions high and hence, will be 105*d07c41ebSNuno Sa available after a power cycle (the chip loads the contents of 106*d07c41ebSNuno Sa the EE_FAULT_LOG register - the one in EEPROM - into FAULT_LOG at boot). 107*d07c41ebSNuno Sa type: boolean 108*d07c41ebSNuno Sa 109*d07c41ebSNuno Sa adi,gpio1-mode: 110*d07c41ebSNuno Sa description: Defines the function of the Pin. It can indicate that power is 111*d07c41ebSNuno Sa good (PULL the pin low when power is not good) or that power is bad (Go 112*d07c41ebSNuno Sa into high-z when power is not good). 113*d07c41ebSNuno Sa $ref: /schemas/types.yaml#/definitions/string 114*d07c41ebSNuno Sa enum: [power_bad, power_good] 115*d07c41ebSNuno Sa default: power_good 116*d07c41ebSNuno Sa 117*d07c41ebSNuno Sa adi,gpio2-mode: 118*d07c41ebSNuno Sa description: Defines the function of the Pin. It can be set as the input for 119*d07c41ebSNuno Sa the ADC or indicating that the MOSFET is in stress (dissipating power). 120*d07c41ebSNuno Sa $ref: /schemas/types.yaml#/definitions/string 121*d07c41ebSNuno Sa enum: [adc_input, stress_fet] 122*d07c41ebSNuno Sa default: adc_input 123*d07c41ebSNuno Sa 124*d07c41ebSNuno Sa adi,gpio3-monitor-enable: 125*d07c41ebSNuno Sa description: If set, gpio3 is set as input for the ADC instead of gpio2. 126*d07c41ebSNuno Sa type: boolean 127*d07c41ebSNuno Sa 128*d07c41ebSNuno SaallOf: 129*d07c41ebSNuno Sa - if: 130*d07c41ebSNuno Sa required: 131*d07c41ebSNuno Sa - adi,gpio3-monitor-enable 132*d07c41ebSNuno Sa then: 133*d07c41ebSNuno Sa properties: 134*d07c41ebSNuno Sa adi,gpio2-mode: 135*d07c41ebSNuno Sa const: stress_fet 136*d07c41ebSNuno Sa 137*d07c41ebSNuno Sarequired: 138*d07c41ebSNuno Sa - compatible 139*d07c41ebSNuno Sa - reg 140*d07c41ebSNuno Sa - adi,rsense-nano-ohms 141*d07c41ebSNuno Sa 142*d07c41ebSNuno SaadditionalProperties: false 143*d07c41ebSNuno Sa 144*d07c41ebSNuno Saexamples: 145*d07c41ebSNuno Sa - | 146*d07c41ebSNuno Sa i2c { 147*d07c41ebSNuno Sa #address-cells = <1>; 148*d07c41ebSNuno Sa #size-cells = <0>; 149*d07c41ebSNuno Sa 150*d07c41ebSNuno Sa hwmon@50 { 151*d07c41ebSNuno Sa compatible = "adi,ltc4282"; 152*d07c41ebSNuno Sa reg = <0x50>; 153*d07c41ebSNuno Sa adi,rsense-nano-ohms = <500>; 154*d07c41ebSNuno Sa 155*d07c41ebSNuno Sa adi,gpio1-mode = "power_good"; 156*d07c41ebSNuno Sa adi,gpio2-mode = "adc_input"; 157*d07c41ebSNuno Sa }; 158*d07c41ebSNuno Sa }; 159*d07c41ebSNuno Sa... 160