1Device tree configuration for the GFX display device on the ASPEED SoCs 2 3Required properties: 4 - compatible 5 * Must be one of the following: 6 + aspeed,ast2500-gfx 7 + aspeed,ast2400-gfx 8 * In addition, the ASPEED pinctrl bindings require the 'syscon' property to 9 be present 10 11 - reg: Physical base address and length of the GFX registers 12 13 - interrupts: interrupt number for the GFX device 14 15 - clocks: clock number used to generate the pixel clock 16 17 - resets: reset line that must be released to use the GFX device 18 19 - memory-region: 20 Phandle to a memory region to allocate from, as defined in 21 Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt 22 23 24Example: 25 26gfx: display@1e6e6000 { 27 compatible = "aspeed,ast2500-gfx", "syscon"; 28 reg = <0x1e6e6000 0x1000>; 29 reg-io-width = <4>; 30 clocks = <&syscon ASPEED_CLK_GATE_D1CLK>; 31 resets = <&syscon ASPEED_RESET_CRT1>; 32 interrupts = <0x19>; 33 memory-region = <&gfx_memory>; 34}; 35 36gfx_memory: framebuffer { 37 size = <0x01000000>; 38 alignment = <0x01000000>; 39 compatible = "shared-dma-pool"; 40 reusable; 41}; 42